[PATCH v1 12/43] x86: Add bindings for NHLT

[Simon Glass]

Hi Bin,

On Mon, 29 Jun 2020 at 23:58, Bin Meng <bmeng.cn at gmail.com> wrote:
>
> Hi Simon,
>
> On Mon, Jun 15, 2020 at 11:57 AM Simon Glass <sjg at chromium.org> wrote:
> >
> > Add devicetree bindings for the Intel Non-High-Definition-Audio Link Table
> > (NHLT).
> >
> > Signed-off-by: Simon Glass <sjg at chromium.org>
> > ---
> >
> >  include/dt-bindings/sound/nhlt.h | 23 +++++++++++++++++++++++
> >  1 file changed, 23 insertions(+)
> >  create mode 100644 include/dt-bindings/sound/nhlt.h
> >
> > diff --git a/include/dt-bindings/sound/nhlt.h b/include/dt-bindings/sound/nhlt.h
> > new file mode 100644
> > index 0000000000..c33f874966
> > --- /dev/null
> > +++ b/include/dt-bindings/sound/nhlt.h
> > @@ -0,0 +1,23 @@
> > +/* SPDX-License-Identifier: GPL-2.0 */
> > +/*
> > + * Copyright 2019 Google LLC
> > + */
> > +
> > +#ifndef _DT_BINDINGS_SOUND_NHLT_H
> > +#define _DT_BINDINGS_SOUND_NHLT_H
> > +
> > +#define NHLT_VID       0x8086
> > +#define NHLT_DID_DMIC  0xae20
> > +#define NHLT_DID_BT    0xae30
> > +#define NHLT_DID_SSP   0xae34
>
> These look like PCI vendor ID (0x8086 for Intel) and device IDs. If
> they are device IDs, how could they be fixed?

The value of the 8086 one is the same. But according to the spec these
are virtual devices. I am not sure that the values have anything to do
with PCI.  The spec doesn't even mention PCI and the PCI ID database
does not list the DID values.

So I think we should leave these as is unless we get new information.

Regards,
SImon