[PATCH 3/3] serial: uniphier: enable FIFO

Masahiro Yamada yamada.masahiro at socionext.com
Thu Jul 9 18:12:08 CEST 2020


This UART controller is integrated with a FIFO. Enable it.

You can put the next character into the FIFO while the transmitter
is sending out the current character. This works slightly faster.

Signed-off-by: Masahiro Yamada <yamada.masahiro at socionext.com>
---

 drivers/serial/serial_uniphier.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/serial/serial_uniphier.c b/drivers/serial/serial_uniphier.c
index aaf8657ee1..ad691b66da 100644
--- a/drivers/serial/serial_uniphier.c
+++ b/drivers/serial/serial_uniphier.c
@@ -23,6 +23,7 @@
 #define UNIPHIER_UART_TX		UNIPHIER_UART_RX
 /* bit[15:8] = CHAR, bit[7:0] = FCR */
 #define UNIPHIER_UART_CHAR_FCR		(3 << (UNIPHIER_UART_REGSHIFT))
+#define   UNIPHIER_UART_FCR_MASK		GENMASK(7, 0)
 /* bit[15:8] = LCR, bit[7:0] = MCR */
 #define UNIPHIER_UART_LCR_MCR		(4 << (UNIPHIER_UART_REGSHIFT))
 #define   UNIPHIER_UART_LCR_MASK		GENMASK(15, 8)
@@ -140,6 +141,12 @@ static int uniphier_serial_probe(struct udevice *dev)
 	while (!(readl(priv->membase + UNIPHIER_UART_LSR) & UART_LSR_TEMT))
 		;
 
+	/* enable FIFO */
+	tmp = readl(priv->membase + UNIPHIER_UART_CHAR_FCR);
+	tmp &= ~UNIPHIER_UART_FCR_MASK;
+	tmp |= FIELD_PREP(UNIPHIER_UART_FCR_MASK, UART_FCR_ENABLE_FIFO);
+	writel(tmp, priv->membase + UNIPHIER_UART_CHAR_FCR);
+
 	tmp = readl(priv->membase + UNIPHIER_UART_LCR_MCR);
 	tmp &= ~UNIPHIER_UART_LCR_MASK;
 	tmp |= FIELD_PREP(UNIPHIER_UART_LCR_MASK, UART_LCR_WLEN8);
-- 
2.25.1



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