[PATCH v3 5/5] configs: reset: fu540: enable dm reset framework for SiFive SoC

[Sagar Shrikant Kadam]

Add necessary defconfig and Kconfig entries to enable SiFive SoC's
reset driver so as to utilise U-Boot's reset framework.

Signed-off-by: Sagar Shrikant Kadam <sagar.kadam at sifive.com>
Reviewed-by: Pragnesh Patel <Pragnesh.patel at sifive.com>
Reviewed-by: Bin Meng <bin.meng at windriver.com>
Tested-by: Bin Meng <bin.meng at windriver.com>
---
 configs/sifive_fu540_defconfig | 2 ++
 drivers/reset/Kconfig          | 9 +++++++++
 drivers/reset/Makefile         | 1 +
 3 files changed, 12 insertions(+)

diff --git a/configs/sifive_fu540_defconfig b/configs/sifive_fu540_defconfig
index 32347c2..12f2469 100644
--- a/configs/sifive_fu540_defconfig
+++ b/configs/sifive_fu540_defconfig
@@ -20,3 +20,5 @@ CONFIG_DEFAULT_DEVICE_TREE="hifive-unleashed-a00"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_SPL_CLK=y
 CONFIG_DM_MTD=y
+CONFIG_SPL_DM_RESET=y
+CONFIG_DM_RESET=y
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 88d3be1..627f8e8 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -148,4 +148,13 @@ config RESET_IMX7
 	help
 	  Support for reset controller on i.MX7/8 SoCs.
 
+config RESET_SIFIVE
+	bool "Reset Driver for SiFive SoC's"
+	depends on DM_RESET && CLK_SIFIVE_FU540_PRCI && TARGET_SIFIVE_FU540
+	default y
+	help
+	  PRCI module within SiFive SoC's provides mechanism to reset
+	  different hw blocks like DDR, gemgxl. With this driver we leverage
+	  U-Boot's reset framework to reset these hardware blocks.
+
 endmenu
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 0a044d5..e3c27c4 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -23,3 +23,4 @@ obj-$(CONFIG_RESET_MTMIPS) += reset-mtmips.o
 obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
 obj-$(CONFIG_RESET_HISILICON) += reset-hisilicon.o
 obj-$(CONFIG_RESET_IMX7) += reset-imx7.o
+obj-$(CONFIG_RESET_SIFIVE) += reset-sifive.o
-- 
2.7.4