[PATCH v1 1/4] clk: agilex: Add NAND clock support
Chee Hong Ang
chee.hong.ang at intel.com
Fri Jul 10 14:55:20 CEST 2020
From: Ley Foon Tan <ley.foon.tan at intel.com>
Add get nand_clk and nand_x clock support.
Signed-off-by: Ley Foon Tan <ley.foon.tan at intel.com>
Signed-off-by: Chee Hong Ang <chee.hong.ang at intel.com>
---
drivers/clk/altera/clk-agilex.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/clk/altera/clk-agilex.c b/drivers/clk/altera/clk-agilex.c
index 0042958f4c..2ef9292f93 100644
--- a/drivers/clk/altera/clk-agilex.c
+++ b/drivers/clk/altera/clk-agilex.c
@@ -533,7 +533,10 @@ static ulong socfpga_clk_get_rate(struct clk *clk)
case AGILEX_EMAC2_CLK:
return clk_get_emac_clk_hz(plat, clk->id);
case AGILEX_USB_CLK:
+ case AGILEX_NAND_X_CLK:
return clk_get_l4_mp_clk_hz(plat);
+ case AGILEX_NAND_CLK:
+ return clk_get_l4_mp_clk_hz(plat) / 4;
default:
return -ENXIO;
}
--
2.19.0
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