[PATCH v6 00/21] mtd: spi-nor-core: add xSPI Octal DTR support

[Vignesh Raghavendra]

On 09/07/20 1:43 pm, Jagan Teki wrote:
> On Tue, Jul 7, 2020 at 7:00 PM Vignesh Raghavendra <vigneshr at ti.com> wrote:
>>
>> Hi Jagan,
>>
>> On 15/06/20 9:21 pm, Pratyush Yadav wrote:
>>> On 05/06/20 06:14PM, Pratyush Yadav wrote:
>>>> Hi,
>>>>
>>>> This series adds support for octal DTR flashes in the spi-nor framework,
>>>> and then adds hooks for the Cypress Semper flash which is an xSPI
>>>> compliant Octal DTR flash.
>>>>
>>>> The Cadence QSPI controller driver is also updated to run in Octal DTR
>>>> mode.
>>>>
>>>> Tested on TI J721e EVM.
>>>>
>>>> The Travis CI build can be found here [0]. It is from the previous
>>>> version, but there is no code change between the two versions.
>>>>
>>>> [0] https://travis-ci.org/github/prati0100/uboot/builds/694602802
>>>
>>> Jagan,
>>>
>>> Do you have any comments for the series? If not, can it please be merged
>>> in?
>>>
>>
>> Ping, given that merge window is opening shortly.. Could you take a look
>> at this series?
> 
> Except for soft reset patches, the rest of them seems okay. Is Linux
> support the same way w/o CONFIG options?
> 

Yes, patches are mostly similar to what is being discussed on Linux
list. Note that soft reset is optional and is required only in case ROM
leaves Flash in Octal DDR (or such stateful modes). In such cases,
U-Boot cannot read Device ID and do flash specific initialization,
therefore its necessary to soft reset the flash to get it back to 1 bit
mode/1S-1S-1S mode in order to start flash detection.
Linux can get away with this as bootloader such as U-Boot would take
care of handing over flash in default 1 bit/1S-1S-1S mode.

Regards
Vignesh