[PATCH v1 4/4] clk: agilex: Additional membus writes for HPS PLL

Tan, Ley Foon ley.foon.tan at intel.com
Tue Jul 14 11:59:20 CEST 2020



> -----Original Message-----
> From: Ang, Chee Hong <chee.hong.ang at intel.com>
> Sent: Friday, July 10, 2020 8:55 PM
> To: u-boot at lists.denx.de
> Cc: Marek Vasut <marex at denx.de>; Simon Goldschmidt
> <simon.k.r.goldschmidt at gmail.com>; See, Chin Liang
> <chin.liang.see at intel.com>; Tan, Ley Foon <ley.foon.tan at intel.com>; Ang,
> Chee Hong <chee.hong.ang at intel.com>
> Subject: [PATCH v1 4/4] clk: agilex: Additional membus writes for HPS PLL
> 
> Add additional membus writes to configure main and peripheral PLL for
> Agilex's clock manager.
> 
> Signed-off-by: Chee Hong Ang <chee.hong.ang at intel.com>
> ---
Reviewed-by: Ley Foon Tan <ley.foon.tan at intel.com>


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