[PATCH v2 1/2] riscv: dts: hifive-unleashed-a00: Make memory node available to SPL

Pragnesh Patel pragnesh.patel at sifive.com
Mon Jul 20 11:31:56 CEST 2020


>-----Original Message-----
>From: Bin Meng <bmeng.cn at gmail.com>
>Sent: 20 July 2020 11:37
>To: Rick Chen <rick at andestech.com>; Pragnesh Patel
><pragnesh.patel at sifive.com>; Sagar Kadam <sagar.kadam at sifive.com>; U-
>Boot Mailing List <u-boot at lists.denx.de>
>Cc: Bin Meng <bin.meng at windriver.com>
>Subject: [PATCH v2 1/2] riscv: dts: hifive-unleashed-a00: Make memory node
>available to SPL
>
>[External Email] Do not click links or attachments unless you recognize the
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>
>From: Bin Meng <bin.meng at windriver.com>
>
>Make memory node available to SPL in prepration to updates to SiFive DDR
>RAM driver to read memory information from DT.
>
>Signed-off-by: Bin Meng <bin.meng at windriver.com>
>---
>
>Changes in v2:
>- rebase on top of u-boot-riscv/master
>
> arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi | 4 ++++
> 1 file changed, 4 insertions(+)
>

Reviewed-by: Pragnesh Patel <pragnesh.patel at sifive.com>



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