[PATCH] Update Winbond SPI NOR Flash ID table

[STLin2 at winbond.com]

Dear Jagan sir:

        Many thanks for your response. Sorry that it is my first time to apply the patch, if there is any problem, your comment would be appreciated.

        Follow my understanding, I rebase the master and the branch "UpdateWinbondID" is up to date. I use patman to check my work. It show 0 errors and 0 warning. But no sending. Is there anything I need to do to continue the patch work?

        I resend the patch as follow.

Sincerely

From bed4ebba8cba95d1be7f2473563e5254f6f1eab0 Mon Sep 17 00:00:00 2001
From: Steam Lin <Stlin2 at winbond.com>
Date: Tue, 21 Jul 2020 16:48:19 +0800
Subject: [PATCH 1/1] Update Winbond SPI NOR Flash ID table for U-boot

Update 512Mbit,
1GMbit device ID.

Update correct JEDEC ID = 0xEF7019
device's name

Signed-off-by: Steam Lin <Stlin2 at winbond.com>
---

 drivers/mtd/spi/spi-nor-ids.c | 67 ++++++++++++++++++++++++++++++++++-
 1 file changed, 66 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 114ebacde1..37895e714d 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -304,7 +304,72 @@ const struct flash_info spi_nor_ids[] = {
                        SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
        },
        {
-               INFO("w25q256jw", 0xef7019, 0, 64 * 1024, 512,
+               INFO("w25q256jvxxIM", 0xef7019, 0, 64 * 1024, 512,
+                       SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+                       SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+       },
+       {
+               INFO("w25q256jwxxIM", 0xef8019, 0, 64 * 1024, 512,
+                       SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+                       SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+       },
+       {
+               INFO("w25q512jvxxIQ", 0xef4020, 0, 64 * 1024, 1024,
+                       SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+                       SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+       },
+       {
+               INFO("w25q512jvxxIM", 0xef7020, 0, 64 * 1024, 1024,
+                       SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+                       SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+       },
+       {
+               INFO("w25H512jvxxIM", 0xef9020, 0, 64 * 1024, 1024,
+                       SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+                       SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+       },
+       {
+               INFO("w25q512jwxxIQ", 0xef6020, 0, 64 * 1024, 1024,
+                       SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+                       SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+       },
+       {
+               INFO("w25q512jvxxIM", 0xef8020, 0, 64 * 1024, 1024,
+                       SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+                       SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+       },
+       {
+               INFO("w25H512jvxxIM", 0xefA020, 0, 64 * 1024, 1024,
+                       SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+                       SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+       },
+       {
+               INFO("w25q01jvxxIQ", 0xef4021, 0, 64 * 1024, 2048,
+                       SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+                       SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+       },
+       {
+               INFO("w25q01jvxxIM", 0xef7021, 0, 64 * 1024, 2048,
+                       SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+                       SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+       },
+       {
+               INFO("w25H01jvxxIM", 0xef9021, 0, 64 * 1024, 2048,
+                       SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+                       SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+       },
+       {
+               INFO("w25q01jwxxIQ", 0xef6021, 0, 64 * 1024, 2048,
+                       SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+                       SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+       },
+       {
+               INFO("w25q01jwxxIM", 0xef8021, 0, 64 * 1024, 2048,
+                       SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+                       SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+       },
+       {
+               INFO("w25H01jwxxIM", 0xefA021, 0, 64 * 1024, 2048,
                        SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
                        SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
        },
--
2.17.1


-----Original Message-----
From: Jagan Teki [mailto:jagan at amarulasolutions.com]
Sent: Tuesday, July 21, 2020 1:10 AM
To: PN10 STLin2 <STLin2 at winbond.com>
Cc: u-boot at lists.denx.de; Vignesh R <vigneshr at ti.com>
Subject: Re: [PATCH] Update Winbond SPI NOR Flash ID table

On Wed, Jul 8, 2020 at 3:17 PM STLin2 at winbond.com <STLin2 at winbond.com> wrote:
>
> From f76b538a6a8081f9e21012a0de665a263cc6fa16 Mon Sep 17 00:00:00 2001
> From: Steam Lin <Stlin2 at winbond.com>
> Date: Wed, 8 Jul 2020 16:51:41 +0800
> Subject: [PATCH] Update Winbond device ID in ID table
>
> Update Winbond SPI NOR Flash id table for uboot
>
> Update 512Mbit, 1Gbit device ID and correct JEDEC ID = 0xEF7019 device's name.
>
> Signed-off-by: Steam Lin <Stlin2 at winbond.com>
> ---

Please work with the commit message head.

mtd: spi: Update Winbond SPI NOR Flash ID table

and rebase on the master.

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