[PATCH 0/6] riscv: Clean up timer drivers

[Sean Anderson]

This series cleans up the timer drivers in RISC-V and converts them to DM.

This series depends on [1]. This series needs to be tested! I have only tested
it on QEMU and the K210. Notably, this means that the HiFive and anything Andes
is completely untested. CI for this series is located at [2].

[1] https://patchwork.ozlabs.org/project/uboot/list/?series=190862
[2] https://dev.azure.com/seanga2/u-boot/_build/results?buildId=4


Sean Anderson (6):
  riscv: Rework riscv timer driver to only support S-mode
  riscv: Rework Andes PLMT as a UCLASS_TIMER driver
  riscv: Clean up initialization in Andes PLIC
  riscv: Rework Sifive CLINT as UCLASS_TIMER driver
  riscv: Update Kendryte device tree for new CLINT driver
  riscv: Update SiFive device tree for new CLINT driver

 arch/riscv/Kconfig                      |  8 ---
 arch/riscv/dts/ae350_32.dts             |  1 +
 arch/riscv/dts/ae350_64.dts             |  1 +
 arch/riscv/dts/fu540-c000-u-boot.dtsi   |  7 +-
 arch/riscv/dts/k210.dtsi                | 10 +--
 arch/riscv/include/asm/global_data.h    |  3 -
 arch/riscv/lib/Makefile                 |  1 -
 arch/riscv/lib/andes_plic.c             | 58 +++++++----------
 arch/riscv/lib/andes_plmt.c             | 42 ++++++------
 arch/riscv/lib/rdtime.c                 | 38 -----------
 arch/riscv/lib/sifive_clint.c           | 87 ++++++++++++++++---------
 common/spl/spl_opensbi.c                |  5 ++
 drivers/clk/kendryte/clk.c              |  4 ++
 drivers/ram/sifive/Kconfig              |  2 +
 drivers/timer/Kconfig                   |  6 +-
 drivers/timer/riscv_timer.c             | 39 +++++------
 include/dt-bindings/clock/k210-sysctl.h |  1 +
 17 files changed, 151 insertions(+), 162 deletions(-)
 delete mode 100644 arch/riscv/lib/rdtime.c

-- 
2.27.0