[PATCH 5/6] riscv: Update Kendryte device tree for new CLINT driver

Sean Anderson seanga2 at gmail.com
Wed Jul 22 17:51:09 CEST 2020


AFAIK because the K210 clock driver does not come up until after
relocation, the clint will always use the clock-frequency parameter.
Ideally, it should update itself after relocation to take into account the
actual CPU frequency.

Signed-off-by: Sean Anderson <seanga2 at gmail.com>
---

 arch/riscv/dts/k210.dtsi                | 10 ++++++----
 drivers/clk/kendryte/clk.c              |  4 ++++
 include/dt-bindings/clock/k210-sysctl.h |  1 +
 3 files changed, 11 insertions(+), 4 deletions(-)

diff --git a/arch/riscv/dts/k210.dtsi b/arch/riscv/dts/k210.dtsi
index 2546c7d4e0..9583694c46 100644
--- a/arch/riscv/dts/k210.dtsi
+++ b/arch/riscv/dts/k210.dtsi
@@ -17,6 +17,8 @@
 	compatible = "kendryte,k210";
 
 	aliases {
+		cpu0 = &cpu0;
+		cpu1 = &cpu1;
 		dma0 = &dmac0;
 		gpio0 = &gpio0;
 		gpio1 = &gpio1_0;
@@ -40,7 +42,6 @@
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
-		timebase-frequency = <7800000>;
 		cpu0: cpu at 0 {
 			device_type = "cpu";
 			compatible = "kendryte,k210", "sifive,rocket0", "riscv";
@@ -126,14 +127,15 @@
 			read-only;
 		};
 
-		clint0: interrupt-controller at 2000000 {
+		clint0: clint at 2000000 {
 			#interrupt-cells = <1>;
 			compatible = "kendryte,k210-clint", "riscv,clint0";
 			reg = <0x2000000 0xC000>;
-			interrupt-controller;
 			interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>,
 					      <&cpu1_intc 3>, <&cpu1_intc 7>;
-			clocks = <&sysclk K210_CLK_CPU>;
+			clocks = <&sysclk K210_CLK_CLINT>;
+			/* sysclk is only available post-relocation */
+			clock-frequency = <7800000>;
 		};
 
 		plic0: interrupt-controller at C000000 {
diff --git a/drivers/clk/kendryte/clk.c b/drivers/clk/kendryte/clk.c
index 981b3b7699..bb196961af 100644
--- a/drivers/clk/kendryte/clk.c
+++ b/drivers/clk/kendryte/clk.c
@@ -646,6 +646,10 @@ static int k210_clk_probe(struct udevice *dev)
 	REGISTER_GATE(K210_CLK_RTC,   "rtc",   in0);
 #undef REGISTER_GATE
 
+	/* The MTIME register in CLINT runs at one 50th the CPU clock speed */
+	clk_dm(K210_CLK_CLINT,
+	       clk_register_fixed_factor(NULL, "clint", "cpu", 0, 1, 50));
+
 	return 0;
 }
 
diff --git a/include/dt-bindings/clock/k210-sysctl.h b/include/dt-bindings/clock/k210-sysctl.h
index 0e3ed3fb9f..fe852bbd92 100644
--- a/include/dt-bindings/clock/k210-sysctl.h
+++ b/include/dt-bindings/clock/k210-sysctl.h
@@ -55,5 +55,6 @@
 #define K210_CLK_OTP    43
 #define K210_CLK_RTC    44
 #define K210_CLK_ACLK   45
+#define K210_CLK_CLINT  46
 
 #endif /* CLOCK_K210_SYSCTL_H */
-- 
2.27.0



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