[PATCH 6/6] riscv: Update SiFive device tree for new CLINT driver
Bin Meng
bmeng.cn at gmail.com
Thu Jul 23 16:47:52 CEST 2020
Hi Sean,
On Thu, Jul 23, 2020 at 9:57 PM Sean Anderson <seanga2 at gmail.com> wrote:
>
> On 7/23/20 9:50 AM, Bin Meng wrote:
> > Hi Sean,
> >
> > On Wed, Jul 22, 2020 at 11:51 PM Sean Anderson <seanga2 at gmail.com> wrote:
> >>
> >> We may need to add a clock-frequency binding like for the K210.
> >>
> >> Signed-off-by: Sean Anderson <seanga2 at gmail.com>
> >> ---
> >> This patch builds but has NOT been tested.
> >>
> >> arch/riscv/dts/fu540-c000-u-boot.dtsi | 7 ++++++-
> >> 1 file changed, 6 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/arch/riscv/dts/fu540-c000-u-boot.dtsi b/arch/riscv/dts/fu540-c000-u-boot.dtsi
> >> index afdb4f4402..e56bfc7595 100644
> >> --- a/arch/riscv/dts/fu540-c000-u-boot.dtsi
> >> +++ b/arch/riscv/dts/fu540-c000-u-boot.dtsi
> >> @@ -55,8 +55,13 @@
> >> };
> >> clint at 2000000 {
> >> compatible = "riscv,clint0";
> >> - interrupts-extended = <&cpu0_intc 3 &cpu0_intc 7 &cpu1_intc 3 &cpu1_intc 7 &cpu2_intc 3 &cpu2_intc 7 &cpu3_intc 3 &cpu3_intc 7 &cpu4_intc 3 &cpu4_intc 7>;
> >> + interrupts-extended = <&cpu0_intc 3 &cpu0_intc 7
> >> + &cpu1_intc 3 &cpu1_intc 7
> >> + &cpu2_intc 3 &cpu2_intc 7
> >> + &cpu3_intc 3 &cpu3_intc 7
> >> + &cpu4_intc 3 &cpu4_intc 7>;
> >> reg = <0x0 0x2000000 0x0 0xc0000>;
> >> + clocks = <&prci PRCI_CLK_COREPLL>;
> >
> > This looks wrong to me. The CLINT timer frequency should come from the RTC node.
> >
> > +Pragnesh Patel
> >
> > +Sagar Kadam
>
> On further review, I think you are right that this should be RTCCLK_FREQ.
>
> Perhaps the clocks part should be moved into
> arch/riscv/dts/hifive-unleashed-a00-u-boot.dts and changed to something
> like
>
> clocks = <&rtcclk>;
How does the device tree look like in the upstream Linux to work with
the new CLINT timer driver?
Regards,
Bin
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