[PATCH v1 06/24] pci: pci-uclass: Add multi entry support for memory regions

Simon Glass sjg at chromium.org
Tue Jul 28 21:01:32 CEST 2020


Hi Stefan,

On Fri, 24 Jul 2020 at 04:09, Stefan Roese <sr at denx.de> wrote:
>
> From: Suneel Garapati <sgarapati at marvell.com>
>
> Enable PCI memory regions in ranges property to be of multiple entry.
> This helps to add support for SoC's like OcteonTX/TX2 where every
> peripheral is on PCI bus.
>
> Signed-off-by: Suneel Garapati <sgarapati at marvell.com>
> Cc: Simon Glass <sjg at chromium.org>
> Cc: Bin Meng <bmeng.cn at gmail.com>
>
> Signed-off-by: Stefan Roese <sr at denx.de>
> ---
>
> Changes in v1:
> - Change patch subject
> - Enhance Kconfig help descrition
> - Use if() instead of #if
>
>  drivers/pci/Kconfig      | 10 ++++++++++
>  drivers/pci/pci-uclass.c |  9 ++++++---
>  2 files changed, 16 insertions(+), 3 deletions(-)

This needs an update to a sandbox test to handle this behaviour.


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