[PATCH v4 0/5] add DM based reset driver for SiFive SoC's

[Rick Chen]

Hi Sagar

> From: Sagar Kadam [mailto:sagar.kadam at sifive.com]
> Sent: Tuesday, July 28, 2020 11:19 PM
> To: u-boot at lists.denx.de
> Cc: Rick Jian-Zhi Chen(陳建志); Paul Walmsley ( Sifive); palmer at dabbelt.com; anup.patel at wdc.com; atish.patra at wdc.com; lukma at denx.de; Pragnesh Patel; bin.meng at windriver.com; jagan at amarulasolutions.com; sjg at chromium.org; twoerner at gmail.com; patrick at blueri.se; mbrugger at suse.com; Eugeniy.Paltsev at synopsys.com; weijie.gao at mediatek.com; nsaenzjulienne at suse.de; festevam at gmail.com; seanga2 at gmail.com
> Subject: RE: [PATCH v4 0/5] add DM based reset driver for SiFive SoC's
>
> Hello Rick,
>
> > -----Original Message-----
> > From: Sagar Kadam
> > Sent: Monday, July 27, 2020 8:56 PM
> > To: u-boot at lists.denx.de
> > Cc: rick at andestech.com; Paul Walmsley ( Sifive)
> > <paul.walmsley at sifive.com>; palmer at dabbelt.com; anup.patel at wdc.com;
> > atish.patra at wdc.com; lukma at denx.de; Pragnesh Patel
> > <pragnesh.patel at sifive.com>; bin.meng at windriver.com;
> > jagan at amarulasolutions.com; sjg at chromium.org; twoerner at gmail.com;
> > patrick at blueri.se; mbrugger at suse.com; Eugeniy.Paltsev at synopsys.com;
> > weijie.gao at mediatek.com; nsaenzjulienne at suse.de; festevam at gmail.com;
> > seanga2 at gmail.com
> > Subject: RE: [PATCH v4 0/5] add DM based reset driver for SiFive SoC's
> >
> > Hi Rick,
> > > -----Original Message-----
> > > From: Sagar Kadam <sagar.kadam at sifive.com>
> > > Sent: Friday, July 24, 2020 2:17 PM
> > > To: u-boot at lists.denx.de
> > > Cc: rick at andestech.com; Paul Walmsley ( Sifive)
> > > <paul.walmsley at sifive.com>; palmer at dabbelt.com;
> > anup.patel at wdc.com;
> > > atish.patra at wdc.com; lukma at denx.de; Pragnesh Patel
> > > <pragnesh.patel at sifive.com>; bin.meng at windriver.com;
> > > jagan at amarulasolutions.com; sjg at chromium.org; twoerner at gmail.com;
> > > patrick at blueri.se; mbrugger at suse.com; Eugeniy.Paltsev at synopsys.com;
> > > weijie.gao at mediatek.com; nsaenzjulienne at suse.de;
> > festevam at gmail.com;
> > > seanga2 at gmail.com; Sagar Kadam <sagar.kadam at sifive.com>
> > > Subject: [PATCH v4 0/5] add DM based reset driver for SiFive SoC's
> > >
> > > The FU540-C000 support in U-Boot is missing DM based reset driver,
> > > and is handling reset's to sub-system within the prci driver itself.
> > > The series here adds a generic DM reset driver for SiFive SoC's so
> > > as to leverage the U-Boot's reset framework and binds the reset
> > > driver with prci driver.
> > > The PRCI driver takes care of triggering the consumers reset signals
> > > appropriately.
> > >
> > > Patch 1: Add necessary dt indexes for device reset register.
> > > Patch 2: Update macro's to use common dt indexes from binding header.
> > > Patch 3: Add reset producer and consumer entries within the device tree.
> > > Patch 4: Add reset dm driver and bind it within prci module.
> > > Patch 5: Add Kconfig, Makefile entries and enable the driver
> > >
> > > This series is re-based on mainline U-Boot commit 5d3a21df6694
> > > ("Merge
> > tag
> > > 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm") and depends on
> > > [1]
> > >
> > > [1] https://patchwork.ozlabs.org/project/uboot/list/?series=190862
> > >
> >
> > I have rebased this series on u-boot/master.
> > Can you please pull it and let me know if any issues are there.
> >
> It seems that u-boot/master is moved ahead and the commit on which this series was based is reverted "Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm""
> and will again conflict considering other patch's that are merged in u-boot/master.
> I can rebase it again, but would like to know what you would prefer me to rebase on u-boot/master or  u-boot-riscv/master?

Yes, it conflict again.
Applying: configs: reset: fu540: enable dm reset framework for SiFive
error: patch failed: configs/sifive_fu540_defconfig:21
error: configs/sifive_fu540_defconfig: patch does not apply
Patch failed at 0001 configs: reset: fu540: enable dm reset framework for SiFive

You can rebase on u-boot-riscv/master.

Thanks,
Rick

>
> Thanks & BR,
> Sagar
>
> > Thanks & BR,
> > Sagar
> >
> > > History:
> > > ==========================
> > > V4:
> > > -Rebased the series to u-boot/master.
> > >
> > > V3:
> > > -Add reset indexes in separate dt binding header instead of
> > > updating the clock dt binding header which is synced from Linux
> > >
> > > V2:
> > > -Removed extra character in commit log of 2nd patch
> > >
> > > V1:
> > > -Base version.
> > >
> > > Sagar Shrikant Kadam (5):
> > >   dt-bindings: prci: add indexes for reset signals available in prci
> > >   fu540: prci: use common reset indexes defined in binding header
> > >   fu540: dtsi: add reset producer and consumer entries
> > >   sifive: reset: add DM based reset driver for SiFive SoC's
> > >   configs: reset: fu540: enable dm reset framework for SiFive
> > >
> > >  arch/riscv/dts/fu540-c000-u-boot.dtsi         |  12 +++
> > >  arch/riscv/include/asm/arch-fu540/reset.h     |  13 +++
> > >  configs/sifive_fu540_defconfig                |   2 +
> > >  drivers/clk/sifive/fu540-prci.c               |  90 ++++++++++++++------
> > >  drivers/reset/Kconfig                         |   9 ++
> > >  drivers/reset/Makefile                        |   1 +
> > >  drivers/reset/reset-sifive.c                  | 118 ++++++++++++++++++++++++++
> > >  include/dt-bindings/reset/sifive-fu540-prci.h |  19 +++++
> > >  8 files changed, 239 insertions(+), 25 deletions(-)  create mode
> > > 100644 arch/riscv/include/asm/arch-fu540/reset.h
> > >  create mode 100644 drivers/reset/reset-sifive.c  create mode 100644
> > > include/dt-bindings/reset/sifive-fu540-prci.h
> > >
> > > --
> > > 2.7.4
>
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