[PATCH v5 0/5] add DM based reset driver for SiFive SoC's
Sagar Kadam
sagar.kadam at sifive.com
Fri Jul 31 15:15:17 CEST 2020
Hi Rick,
> -----Original Message-----
> From: Sagar Kadam <sagar.kadam at sifive.com>
> Sent: Wednesday, July 29, 2020 3:06 PM
> To: u-boot at lists.denx.de
> Cc: rick at andestech.com; Paul Walmsley ( Sifive) <paul.walmsley at sifive.com>;
> palmer at dabbelt.com; anup.patel at wdc.com; atish.patra at wdc.com;
> lukma at denx.de; Pragnesh Patel <pragnesh.patel at sifive.com>;
> bin.meng at windriver.com; jagan at amarulasolutions.com; sjg at chromium.org;
> twoerner at gmail.com; mbrugger at suse.com; Eugeniy.Paltsev at synopsys.com;
> seanga2 at gmail.com; patrick at blueri.se; nsaenzjulienne at suse.de;
> weijie.gao at mediatek.com; festevam at gmail.com; Sagar Kadam
> <sagar.kadam at sifive.com>
> Subject: [PATCH v5 0/5] add DM based reset driver for SiFive SoC's
>
> The FU540-C000 support in U-Boot is missing DM based reset driver, and is
> handling reset's to sub-system within the prci driver itself.
> The series here adds a generic DM reset driver for SiFive SoC's so as to leverage
> the U-Boot's reset framework and binds the reset driver with prci driver.
> The PRCI driver takes care of triggering the consumers reset signals
> appropriately.
>
> Patch 1: Add necessary dt indexes for device reset register.
> Patch 2: Update macro's to use common dt indexes from binding header.
> Patch 3: Add reset producer and consumer entries within the device tree.
> Patch 4: Add reset dm driver and bind it within prci module.
> Patch 5: Add Kconfig, Makefile entries and enable the driver
>
> This series is re-based on u-boot-riscv top commit 3b191c56c841 ("Merge
> branch '2020-07-28-Kconfig-migrations'")
>
> History:
> ==========================
> V5:
> -Rebased the series on u-boot-riscv/master.
>
A gentle reminder to pull in this series.
Thanks & BR,
Sagar
> V4:
> -Rebased the series to u-boot/master.
>
> V3:
> -Add reset indexes in separate dt binding header instead of updating the clock
> dt binding header which is synced from Linux
>
> V2:
> -Removed extra character in commit log of 2nd patch
>
> V1:
> -Base version.
>
> Sagar Shrikant Kadam (5):
> dt-bindings: prci: add indexes for reset signals available in prci
> fu540: prci: use common reset indexes defined in binding header
> fu540: dtsi: add reset producer and consumer entries
> sifive: reset: add DM based reset driver for SiFive SoC's
> configs: reset: fu540: enable dm reset framework for SiFive
>
> arch/riscv/dts/fu540-c000-u-boot.dtsi | 12 +++
> arch/riscv/include/asm/arch-fu540/reset.h | 13 +++
> configs/sifive_fu540_defconfig | 2 +
> drivers/clk/sifive/fu540-prci.c | 90 ++++++++++++++------
> drivers/reset/Kconfig | 9 ++
> drivers/reset/Makefile | 1 +
> drivers/reset/reset-sifive.c | 118 ++++++++++++++++++++++++++
> include/dt-bindings/reset/sifive-fu540-prci.h | 19 +++++
> 8 files changed, 239 insertions(+), 25 deletions(-) create mode 100644
> arch/riscv/include/asm/arch-fu540/reset.h
> create mode 100644 drivers/reset/reset-sifive.c create mode 100644
> include/dt-bindings/reset/sifive-fu540-prci.h
>
> --
> 2.7.4
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