DE1-SoC Board Config

[Simon Goldschmidt]

Am 02.03.2020 um 01:39 schrieb Jack Frye:
> I am trying to build uboot-socfpga for Terasic DE1-SoC board (Cyclone V), booting from SDMMC. I am unable to get u-boot to program the FPGA.

First question: which version of U-Boot are you using? Upstream sources
or Altera sources?

> I am following this guide from RocketBoards.
> https://rocketboards.org/foswiki/Documentation/BuildingBootloader
> with a few addenda. I have successfully built the u-boot-with_spl.sfp file using the configuration socfpga_cyclone5_defconfig. 
> 
> I added 
> #define CONFIG_BOOTCOMMAND "run callscript"
> to socfpga_cyclone5_socsdk.h
> 
> I also added 
> #define CONFIG_EXTRA_ENV_SETTINGS \
> "scriptfile=u-boot.scr" "\0" \
> "fpgadata=0x2000000" "\0" \
> "callscript=fatload mmc 0:1 $fpgadata $scriptfile;" \
> "source $fpgadata" "\0"
> to socfpga_common.h
> 
> My u-boot script contains the commands
> echo --- Programming FPGA ---
> # load rbf from FAT partition into memory
> fatload mmc 0:1 ${fpgadata} output_file.rbf;
> # program FPGA
> fpga load 0 ${fpgadata} ${filesize};
> # enable HPS-to-FPGA, FPGA-to-HPS, LWHPS-to-FPGA bridges
> bridge enable;
> 
> When I reach this part of the script, I am seeing 
> 7007204 bytes read in 366 ms (18.3 MiB/s)
> Command ‘load’ failed: Error -6

That "-6" is not an error code. The code here invalidly returns negative
numbers instead of error codes.

Anyway, the function returning this is fpgamgr_program_poll_initphase()
and it says that FPGA does not enter init phase or user mode after
programming.

Have you tried to execute the steps manually? If so, how long does the
"fpga load" command execute?
Have you tried listing memory contents (or using crc32) after loading
the rbf to see if it is correct?

> 
> I have scoured the internet for answers and posted on RocketBoards forums, but no one seems to be able to diagnose the problem. Those who have assisted me have commented they were able to perform this operation using older versions of the tools. The big difference I understand is that now the SOCEDS builds the preloader into u-boot using the filter_qts script. I wonder if there may be some bug or compatibility issue here.

I'm not sure fpga programming depends on the handoff files...

Regards,
Simon

> 
> I have also tried using socfpga_de1_soc_defconfig, but I do not see any console output when I boot.
>