[PATCH v4 0/5] usb: host: dwc2: use driver model for PHY and CLOCK
simon.k.r.goldschmidt at gmail.com
Wed Mar 4 20:58:07 CET 2020
Am 19.02.2020 um 08:27 schrieb Simon Goldschmidt:
> On Tue, Feb 18, 2020 at 6:53 PM Marek Vasut <marex at denx.de> wrote:
>> On 2/18/20 9:34 AM, Patrick Delaunay wrote:
>>> In this serie I update the DWC2 host driver to use the device tree
>>> information and the associated PHY and CLOCK drivers when they are
>>> The V4 is rebased on latest master (v2020.04-rc2).
>>> CI-Tavis build is OK:
>>> NB: CI-Travis build was OK for all target after V3:
>>> As in V2, I cause the warnings for some boards:
>>> drivers/usb/host/built-in.o: In function `dwc2_usb_remove':
>>> drivers/usb/host/dwc2.c:1441: undefined reference to `clk_disable_bulk'
>>> I test this serie on stm32mp157c-ev1 board, with PHY and CLK
>>> The U-CLASS are provided by:
>>> - PHY by USBPHYC driver = ./drivers/phy/phy-stm32-usbphyc.c
>>> - CLOCK by RCC clock driver = drivers/clk/clk_stm32mp1.c
>>> - RESET by RCC reset driver = drivers/reset/stm32-reset.c
>>> And I activate the configuration
>> Simon, can you test this on SOCFPGA ?
> I can test if it probes, but I don't have anything running on that USB port
> the socfpga_socrates board has. Would that be enought to test?
Tested the whole series on socfpga_socrates by instantiating the driver.
Shows the same behaviour as before (I still have no OTG cable to test
attaching a storage device).
More information about the U-Boot