[PATCH v2 28/39] acpi: Add some tables required by the generation code
Simon Glass
sjg at chromium.org
Mon Mar 9 04:44:52 CET 2020
The code which generates ACPI tables programmatically, add a few ACPI
definitions required by that code.
Signed-off-by: Simon Glass <sjg at chromium.org>
---
Changes in v2: None
include/acpi_table.h | 50 ++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 50 insertions(+)
diff --git a/include/acpi_table.h b/include/acpi_table.h
index f500f0d3fe..5fd2cef5d1 100644
--- a/include/acpi_table.h
+++ b/include/acpi_table.h
@@ -28,6 +28,18 @@
struct acpi_ctx;
+/*
+ * The assigned ACPI ID for the coreboot project is 'BOOT'
+ * http://www.uefi.org/acpi_id_list
+ */
+#define COREBOOT_ACPI_ID "BOOT" /* ACPI ID for coreboot HIDs */
+
+/* List of ACPI HID that use the coreboot ACPI ID */
+enum coreboot_acpi_ids {
+ COREBOOT_ACPI_ID_CBTABLE = 0x0000, /* BOOT0000 */
+ COREBOOT_ACPI_ID_MAX = 0xFFFF, /* BOOTFFFF */
+};
+
/*
* RSDP (Root System Description Pointer)
* Note: ACPI 1.0 didn't have length, xsdt_address, and ext_checksum
@@ -365,6 +377,44 @@ struct acpi_csrt_shared_info {
u32 max_block_size;
};
+struct __packed acpi_cstate {
+ u8 ctype;
+ u16 latency;
+ u32 power;
+ struct acpi_gen_regaddr resource;
+};
+
+struct __packed acpi_tstate {
+ u32 percent;
+ u32 power;
+ u32 latency;
+ u32 control;
+ u32 status;
+};
+
+/* Port types for ACPI _UPC object */
+enum acpi_upc_type {
+ UPC_TYPE_A,
+ UPC_TYPE_MINI_AB,
+ UPC_TYPE_EXPRESSCARD,
+ UPC_TYPE_USB3_A,
+ UPC_TYPE_USB3_B,
+ UPC_TYPE_USB3_MICRO_B,
+ UPC_TYPE_USB3_MICRO_AB,
+ UPC_TYPE_USB3_POWER_B,
+ UPC_TYPE_C_USB2_ONLY,
+ UPC_TYPE_C_USB2_SS_SWITCH,
+ UPC_TYPE_C_USB2_SS,
+ UPC_TYPE_PROPRIETARY = 0xff,
+ /*
+ * The following types are not directly defined in the ACPI
+ * spec but are used by coreboot to identify a USB device type.
+ */
+ UPC_TYPE_INTERNAL = 0xff,
+ UPC_TYPE_UNUSED,
+ UPC_TYPE_HUB
+};
+
enum dmar_type {
DMAR_DRHD = 0,
DMAR_RMRR = 1,
--
2.25.1.481.gfbce0eb801-goog
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