[PATCH 3/5] riscv: Add SBI v0.2 extension definitions

Pragnesh Patel pragnesh.patel at sifive.com
Mon Mar 16 12:13:41 CET 2020


Hi Bin,

>-----Original Message-----
>From: U-Boot <u-boot-bounces at lists.denx.de> On Behalf Of Bin Meng
>Sent: 10 March 2020 08:05
>To: Rick Chen <rick at andestech.com>; Anup Patel <anup.patel at wdc.com>;
>Atish Patra <atish.patra at wdc.com>; Lukas Auer
><lukas.auer at aisec.fraunhofer.de>; U-Boot Mailing List <u-
>boot at lists.denx.de>
>Subject: [PATCH 3/5] riscv: Add SBI v0.2 extension definitions
>
>Few v0.1 SBI calls are being replaced by new SBI calls that follows
>v0.2 calling convention.
>
>This patch just defines these new extensions.
>
>This commit is inspired from Linux kernel patch:
>https://patchwork.kernel.org/patch/11407359/
>
>Signed-off-by: Bin Meng <bmeng.cn at gmail.com>
>---
>
> arch/riscv/include/asm/sbi.h | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>
>diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h index
>fc8637c..6d3114c 100644
>--- a/arch/riscv/include/asm/sbi.h
>+++ b/arch/riscv/include/asm/sbi.h
>@@ -22,6 +22,9 @@ enum sbi_ext_id {
> 	SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID = 0x7,
> 	SBI_EXT_0_1_SHUTDOWN = 0x8,
> 	SBI_EXT_BASE = 0x10,
>+	SBI_EXT_TIME = 0x54494D45,
>+	SBI_EXT_IPI = 0x735049,
>+	SBI_EXT_RFENCE = 0x52464E43,
> };
>
> enum sbi_ext_base_fid {
>@@ -34,6 +37,20 @@ enum sbi_ext_base_fid {
> 	SBI_EXT_BASE_GET_MIMPID,
> };
>
>+enum sbi_ext_time_fid {
>+	SBI_EXT_TIME_SET_TIMER = 0,
>+};
>+
>+enum sbi_ext_ipi_fid {
>+	SBI_EXT_IPI_SEND_IPI = 0,
>+};
>+
>+enum sbi_ext_rfence_fid {
>+	SBI_EXT_RFENCE_REMOTE_FENCE_I = 0,
>+	SBI_EXT_RFENCE_REMOTE_SFENCE_VMA,
>+	SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID,
>+};
>+
> #define SBI_SPEC_VERSION_DEFAULT	0x1
> #define SBI_SPEC_VERSION_MAJOR_SHIFT	24
> #define SBI_SPEC_VERSION_MAJOR_MASK	0x7f

Reviewed-by: Pragnesh Patel <pragnesh.patel at sifive.com>

>--
>2.7.4



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