[PATCH v1 2/8] spi: dw: Add device tree properties for fields in CTRL0
marex at denx.de
Sun Mar 22 04:13:23 CET 2020
On 3/22/20 4:08 AM, Sean Anderson wrote:
> On 3/21/20 11:04 PM, Marek Vasut wrote:
>> On 3/22/20 3:36 AM, Sean Anderson wrote:
>>> On 3/21/20 9:51 PM, Marek Vasut wrote:
>>>> On 3/5/20 8:19 PM, Sean Anderson wrote:
>>>>> Some devices have different layouts for the fields in CTRL0 (e.g. the
>>>>> Kendryte K210). Allow this layout to be configurable from the device tree.
>>>>> The documentation has been taken from Linux.
>>>>> Signed-off-by: Sean Anderson <seanga2 at gmail.com>
>>>>> Reviewed-by: Simon Glass <sjg at chromium.org>
>>>> Can't you just have different compatible string for each SoC and derive
>>>> the various fields based on that compatible string, instead of
>>>> describing all the register bitfields in DT ?
>>>> What does Linux do ?
>>> Linux only supports socfpga boards. I don't know if there is any
>>> rhyme/reason to the shifting around of these fields.
>> Could be a different revision of the IP. This is usually handled by
>> using SoC-specific compatible strings, see e.g. Linux
>> You don't want to encode register layout in the DT.
> Ok, then I think adding compatible strings would be the cleanest.
>>> It is possible to
>>> add several compatible strings like "kendryte,k210-spi3".
>> Why ?
> See below.
>>> I chose this
>>> method because the bitfields are different for spi0 and spi1, spi2, and
>>> spi3. If there are other incompatibilities discovered, then it may make
>>> more sense to use different strings. Another option could have been to
>>> use the DW_SPI_VERSION field to detect different controllers, but it is
>>> the same among all the controllers on the K210.
>> The controllers on the same SoC have different register layout ?
> Don't ask me why.
Now that is truly an odd design. Is there a datasheet for this SoC ?
You might be able to somehow enumerate those controllers in DT and
derive their layout from that enumeration or somesuch I think.
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