STM32MP1 boot slow

Marek Vasut marex at
Fri Mar 27 19:21:28 CET 2020

On 3/27/20 4:35 PM, Patrick DELAUNAY wrote:
> Hi Marek,



>> Or reuse the DWC I2C driver timing calculation, which is real simple, fast, and
>> should be accurate enough.
> Yes I checked
> ./drivers/i2c/designware_i2c.c:: __dw_i2c_set_bus_speed
> I agree that something simple should be possible to found 'good enough' setting. 
> But I don't ding in the ST I2C specification.... I waiting internal feedback

OK, that's fine. I believe a much simpler math should be possible here
to figure out the timing values.


>>> I would like to see patches to enable the cache. We did this some
>>> years ago in a Chromebook and it made a big difference. It is not that
>>> hard.
>> ACK. Why did the chromebook patches never make it upstream ?
> Work in progress
> with improvements
> For example, the result on STM32MP157C-DK2 board is:
>    1,6s gain for trusted boot chain with TF-A
>    2,2s gain for basic boot chain with SPL
> I will push this patch after sanity checks
> (ARM requirement on TLB / cache update with MMU activated).

Nice, thanks. CC me when submitting it.


Best regards,
Marek Vasut

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