[PATCH v2 0/9] Add Rockchip RK3399 USB3.0 Host support

[Jagan Teki]

On Thu, Apr 30, 2020 at 7:46 AM Frank Wang <frank.wang at rock-chips.com> wrote:
>
> This series add quirks for DWC3 and add Rockchip RK3399 USB3.0 host
> support.

Just had a quick test with associated config enabled, but usb3.0 seems
to be failing.

rock960 => usb start
starting USB...
Bus usb at fe380000: USB EHCI 1.00
Bus usb at fe3c0000: USB EHCI 1.00
Bus dwc3 at fe900000: usb maximum-speed not found
"Synchronous Abort" handler, esr 0x96000010
elr: 000000000022f7c8 lr : 0000000000242c74 (reloc)
elr: 000000007c55b7c8 lr : 000000007c56ec74
x0 : 000000007a53ced0 x1 : 0000000000000000
x2 : ffffffffffffff00 x3 : 000000000000e3d0
x4 : 0000000000000008 x5 : 00000000ff770000
x6 : 00000000ff770000 x7 : 0000000000000000
x8 : 000000007c5cc5f0 x9 : 0000000000000008
x10: 000000007a5117d0 x11: 0000000000006eac
x12: 000000007a510fcc x13: 0000000000006e40
x14: 0000000000000000 x15: 000000007a5117d0
x16: 0000000000001050 x17: 000000000000001c
x18: 000000007a523d90 x19: 000000007a53cec0
x20: 0000000000000002 x21: 0000000000000001
x22: 0000000000000000 x23: 0000000000000001
x24: 000000007a53cec0 x25: 0000000000000020
x26: 000000007a5253b0 x27: 000000007a53cc88
x28: 000000007a53cc80 x29: 000000007a5113c0

Code: a8c17bfd d65f03c0 b40000e0 f9400001 (f9400021)
Resetting CPU ...

Looks like PHY init from dwc3 seems to be failing to initialize typec
PHY device.

Jagan.