[PATCH v7 10/22] clk: sifive: fu540-prci: ddr and ethernet clock initialization in SPL

[Jagan Teki]

On Sat, May 2, 2020 at 3:38 PM Pragnesh Patel <pragnesh.patel at sifive.com> wrote:
>
> Add ddr clock release reset and ehternet clock initialization for
> SPL

Why ethernet still require for SPL?

Jagan.