[PATCH v7 10/22] clk: sifive: fu540-prci: ddr and ethernet clock initialization in SPL

Jagan Teki jagan at amarulasolutions.com
Sat May 2 18:14:12 CEST 2020

On Sat, May 2, 2020 at 3:38 PM Pragnesh Patel <pragnesh.patel at sifive.com> wrote:
> Add ddr clock release reset and ehternet clock initialization for

Why ethernet still require for SPL?


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