[PATCH v7 10/22] clk: sifive: fu540-prci: ddr and ethernet clock initialization in SPL

[Jagan Teki]

On Sat, May 2, 2020 at 10:05 PM Pragnesh Patel
<pragnesh.patel at sifive.com> wrote:
>
> Hi Jagan,
>
> >-----Original Message-----
> >From: Jagan Teki <jagan at amarulasolutions.com>
> >Sent: 02 May 2020 21:44
> >To: Pragnesh Patel <pragnesh.patel at sifive.com>
> >Cc: U-Boot-Denx <u-boot at lists.denx.de>; Atish Patra
> ><atish.patra at wdc.com>; Palmer Dabbelt <palmerdabbelt at google.com>; Bin
> >Meng <bmeng.cn at gmail.com>; Paul Walmsley <paul.walmsley at sifive.com>;
> >Troy Benjegerdes <troy.benjegerdes at sifive.com>; Anup Patel
> ><anup.patel at wdc.com>; Sagar Kadam <sagar.kadam at sifive.com>; Rick Chen
> ><rick at andestech.com>; Lukasz Majewski <lukma at denx.de>; Anatolij
> >Gustschin <agust at denx.de>; Simon Glass <sjg at chromium.org>
> >Subject: Re: [PATCH v7 10/22] clk: sifive: fu540-prci: ddr and ethernet clock
> >initialization in SPL
> >
> >[External Email] Do not click links or attachments unless you recognize the
> >sender and know the content is safe
> >
> >On Sat, May 2, 2020 at 3:38 PM Pragnesh Patel <pragnesh.patel at sifive.com>
> >wrote:
> >>
> >> Add ddr clock release reset and ehternet clock initialization for SPL
> >
> >Why ethernet still require for SPL?
>
> I think  we have already discussed this in v6.
> https://patchwork.ozlabs.org/project/uboot/patch/20200329170538.25449-10-pragnesh.patel@sifive.com/

Understand, then make a separate patch for "Ethernet SPL" but not in
this series.