[PATCH 6/8] ARM: imx8m: Fix reset in SPL on NXP iMX8MP EVK

[Marek Vasut]

On 5/4/20 4:27 PM, Fabio Estevam wrote:
> Hi,
> 
> On Wed, Apr 29, 2020 at 10:05 AM Harald Seiler <hws at denx.de> wrote:
>>
>> From: Marek Vasut <marex at denx.de>
>>
>> Board files should not re-implement do_reset() to work around this
>> function not being defined in for specific configurations. Rather,
>> the fix is to compile in drivers which implement this properly.
>> This patch enables sysreset and watchdog drivers in SPL and ties
>> them together to implement the same as the do_reset() hack in the
>> board file, except correctly in the DM/DT framework.
>>
>> Signed-off-by: Marek Vasut <marex at denx.de>
>> Cc: Fabio Estevam <festevam at gmail.com>
>> Cc: Flavio Suligoi <f.suligoi at asem.it>
>> Cc: Harald Seiler <hws at denx.de>
>> Cc: Igor Opaniuk <igor.opaniuk at toradex.com>
>> Cc: Marcel Ziswiler <marcel.ziswiler at toradex.com>
>> Cc: Oleksandr Suvorov <oleksandr.suvorov at toradex.com>
>> Cc: Peng Fan <peng.fan at nxp.com>
>> Cc: Stefano Babic <sbabic at denx.de>
> 
> I noticed that this patch breaks the boot on i.MX8MP EVK. Only the
> following line is printed on boot:
> 
> U-Boot SPL 2020.07-rc1-00014-g8142a97d54 (May 04 2020 - 11:15:50 -0300)
> 
> If I revert this patch I can boot it again:
> 
> U-Boot SPL 2020.07-rc1-00015-g02cd8db94f (May 04 2020 - 11:17:25 -0300)
> Normal Boot
> Failed to find clock node. Check device tree
> WDT:   Not found!
> Trying to boot from BOOTROM
> image offset 0x8000, pagesize 0x200, ivt offset 0x0
> 
> 
> U-Boot 2020.07-rc1-00015-g02cd8db94f (May 04 2020 - 11:17:25 -0300)
> 
> CPU:   Freescale i.MX8MP rev1.0 at 1000 MHz
> Reset cause: POR
> Model: NXP i.MX8MPlus EVK board
> DRAM:  6 GiB
> MMC:   FSL_SDHC: 1, FSL_SDHC: 2
> Loading Environment from MMC... OK
> In:    serial
> Out:   serial
> Err:   serial
> Net:   No ethernet found.
> Hit any key to stop autoboot:  0
> u-boot=>
> 
> The "Failed to find clock node. Check device tree" looks suspicious.

The "WDT: not found!" is probably the root cause of your problem.
Maybe the WDT driver fails to probe because it can't resolve it's clock
phandle ("Failed to find clock node")? So maybe you need to fix your
clock in SPL.