[PATCH] usb: dwc3: Add disable u2mac linestate check quirk

Marek Vasut marex at denx.de
Fri May 8 20:53:37 CEST 2020


On 5/8/20 8:50 PM, Jagan Teki wrote:
> On Sat, May 9, 2020 at 12:17 AM Marek Vasut <marex at denx.de> wrote:
>>
>> On 5/8/20 8:39 PM, Jagan Teki wrote:
>>> This patch adds a quirk to disable USB 2.0 MAC linestate check
>>> during HS transmit. Refer the dwc3 databook, we can use it for
>>> some special platforms if the linestate not reflect the expected
>>> line state(J) during transmission.
>>>
>>> When use this quirk, the controller implements a fixed 40-bit
>>> TxEndDelay after the packet is given on UTMI and ignores the
>>> linestate during the transmit of a token (during token-to-token
>>> and token-to-data IPGAP).
>>>
>>> On some rockchip platforms (e.g. rk3399), it requires to disable
>>> the u2mac linestate check to decrease the SSPLIT token to SETUP
>>> token inter-packet delay from 566ns to 466ns, and fix the issue
>>> that FS/LS devices not recognized if inserted through USB 3.0 HUB.
>>>
>>> Reference from below Linux commit,
>>>
>>> commit <65db7a0c9816> ("usb: dwc3: add disable u2mac linestate
>>> check quirk")
>>
>> Is this related to your Alcor micro USB stick , 058f:6387 , problem?
> 
> Yes. Not fully fixed but I can see the disk detecting sometimes.
> 
> This is full log:
> 
> rock960 => usb tree
> USB device tree:
>   1  Hub (480 Mb/s, 0mA)
>      u-boot EHCI Host Controller
> 
>   1  Hub (480 Mb/s, 0mA)
>      u-boot EHCI Host Controller
> 
>   1  Hub (5 Gb/s, 0mA)
>   |  U-Boot XHCI Host Controller
>   |
>   +-2  Mass Storage (480 Mb/s, 200mA)
>        Generic Mass Storage 789CDB36
> 
> rock960 => usb reset
> resetting USB...
> Bus usb at fe380000: USB EHCI 1.00
> Bus usb at fe3c0000: USB EHCI 1.00
> Bus dwc3: usb maximum-speed not found
> dwc3_core_init: In
> Register 2000140 NbrPorts 2
> Starting the controller
> USB XHCI 1.10
> scanning bus usb at fe380000 for devices... 1 USB Device(s) found
> scanning bus usb at fe3c0000 for devices... 1 USB Device(s) found
> scanning bus dwc3 for devices... WARN halted endpoint, queueing URB anyway.
> Unexpected XHCI event TRB, skipping... (7a561670 00000000 13000000 01008401)
> "Synchronous Abort" handler, esr 0x96000010
> elr: 0000000000254cb8 lr : 0000000000254cb8 (reloc)
> elr: 000000007c580cb8 lr : 000000007c580cb8

OK, then please fix it fully and then collect all the patches and send
them at once. Thanks


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