[PATCH 5/8] net: dwc_eth_qos: Make clk_rx and clk_tx optional
David Wu
david.wu at rock-chips.com
Sat May 9 08:31:39 CEST 2020
Hi Patrice,
在 2020/4/30 下午10:00, Patrice CHOTARD 写道:
>> @@ -647,8 +653,10 @@ static void eqos_stop_clks_stm32(struct udevice *dev)
>>
>> debug("%s(dev=%p):\n", __func__, dev);
>>
>> - clk_disable(&eqos->clk_tx);
>> - clk_disable(&eqos->clk_rx);
>> + if (clk_valid(&eqos->clk_tx))
>> + clk_disable(&eqos->clk_tx);
>> + if (clk_valid(&eqos->clk_rx))
>> + clk_disable(&eqos->clk_rx);
>> clk_disable(&eqos->clk_master_bus);
>> if (clk_valid(&eqos->clk_ck))
>> clk_disable(&eqos->clk_ck);
>> @@ -1691,20 +1699,16 @@ static int eqos_probe_resources_stm32(struct udevice *dev)
>> ret = clk_get_by_name(dev, "stmmaceth", &eqos->clk_master_bus);
>> if (ret) {
>> pr_err("clk_get_by_name(master_bus) failed: %d", ret);
>> - goto err_probe;
>> + return ret;
>> }
> why are you changing the error path here ?
The following code has not returned, so for the sake of simpler code,
return directly.
>>
>> - ret = clk_get_by_name(dev, "mac-clk-rx", &eqos->clk_rx);
>> - if (ret) {
>> - pr_err("clk_get_by_name(rx) failed: %d", ret);
>> - goto err_free_clk_master_bus;
>> - }
>> + ret = clk_get_by_name(dev, "mac_clk_rx", &eqos->clk_rx);
>> + if (ret)
>> + pr_warn("clk_get_by_name(rx) failed: %d", ret);
>>
>> - ret = clk_get_by_name(dev, "mac-clk-tx", &eqos->clk_tx);
>> - if (ret) {
>> - pr_err("clk_get_by_name(tx) failed: %d", ret);
>> - goto err_free_clk_rx;
>> - }
>> + ret = clk_get_by_name(dev, "mac_clk_tx", &eqos->clk_tx);
>> + if (ret)
>> + pr_warn("clk_get_by_name(tx) failed: %d", ret);
> Nak
>
> Why are you changing the Rx and Tx clock names ?
>
> for information, check with the kernel dt bindings regarding this driver:
>
> Documentation/devicetree/bindings/net/stm32-dwmac.txt
>
> This patch is breaking ethernet on STM32MP1 boards
I should have made a mistake here. In fact, for Rockchip, there is no
need to obtain this two clock. My intention is to make these two clocks
optional.
>
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