[PATCH v2 10/11] net: dwc_eth_qos: Add EQOS_MAC_MDIO_ADDRESS_CR_100_150 for Rockchip

[David Wu]

Discard this duplicate patch.

在 2020/5/11 下午3:08, David Wu 写道:
> The Rockchip CSR clock range is from 100M to 150M, add
> EQOS_MAC_MDIO_ADDRESS_CR_100_150.
> 
> Signed-off-by: David Wu <david.wu at rock-chips.com>
> ---
> 
> Changes in v2:
> - None
> 
>   drivers/net/dwc_eth_qos.h | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/net/dwc_eth_qos.h b/drivers/net/dwc_eth_qos.h
> index def2706271..39f8452c17 100644
> --- a/drivers/net/dwc_eth_qos.h
> +++ b/drivers/net/dwc_eth_qos.h
> @@ -12,10 +12,10 @@
>   #define EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_DCB		2
>   #define EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_AV		1
>   
> +#define EQOS_MAC_MDIO_ADDRESS_CR_100_150		1
>   #define EQOS_MAC_MDIO_ADDRESS_CR_20_35			2
>   #define EQOS_MAC_MDIO_ADDRESS_CR_250_300		5
>   
> -
>   struct eqos_config {
>   	bool reg_access_always_ok;
>   	int mdio_wait;
>