[PATCH v9 11/18] clk: sifive: fu540-prci: release ethernet clock reset

[Pragnesh Patel]

>-----Original Message-----
>From: Jagan Teki <jagan at amarulasolutions.com>
>Sent: 13 May 2020 13:30
>To: Pragnesh Patel <pragnesh.patel at sifive.com>
>Cc: U-Boot-Denx <u-boot at lists.denx.de>; Atish Patra
><atish.patra at wdc.com>; Palmer Dabbelt <palmerdabbelt at google.com>; Bin
>Meng <bmeng.cn at gmail.com>; Paul Walmsley <paul.walmsley at sifive.com>;
>Anup Patel <anup.patel at wdc.com>; Sagar Kadam
><sagar.kadam at sifive.com>; Rick Chen <rick at andestech.com>; Lukasz
>Majewski <lukma at denx.de>; Anatolij Gustschin <agust at denx.de>; Simon
>Glass <sjg at chromium.org>
>Subject: Re: [PATCH v9 11/18] clk: sifive: fu540-prci: release ethernet clock
>reset
>
>[External Email] Do not click links or attachments unless you recognize the
>sender and know the content is safe
>
>On Wed, May 13, 2020 at 12:48 PM Pragnesh Patel
><pragnesh.patel at sifive.com> wrote:
>>
>> Hi Jagan,
>>
>> >-----Original Message-----
>> >From: Jagan Teki <jagan at amarulasolutions.com>
>> >Sent: 13 May 2020 12:21
>> >To: Pragnesh Patel <pragnesh.patel at sifive.com>
>> >Cc: U-Boot-Denx <u-boot at lists.denx.de>; Atish Patra
>> ><atish.patra at wdc.com>; Palmer Dabbelt <palmerdabbelt at google.com>;
>Bin
>> >Meng <bmeng.cn at gmail.com>; Paul Walmsley
><paul.walmsley at sifive.com>;
>> >Anup Patel <anup.patel at wdc.com>; Sagar Kadam
>> ><sagar.kadam at sifive.com>; Rick Chen <rick at andestech.com>; Lukasz
>> >Majewski <lukma at denx.de>; Anatolij Gustschin <agust at denx.de>; Simon
>> >Glass <sjg at chromium.org>
>> >Subject: Re: [PATCH v9 11/18] clk: sifive: fu540-prci: release
>> >ethernet clock reset
>> >
>> >[External Email] Do not click links or attachments unless you
>> >recognize the sender and know the content is safe
>> >
>> >On Wed, May 13, 2020 at 11:57 AM Pragnesh Patel
>> ><pragnesh.patel at sifive.com> wrote:
>> >>
>> >> Release ethernet clock reset
>> >
>> >Please add a detailed commit message of why the ethernet clock is
>> >resetting in SPL code since ethernet won't need for SPL at all?
>>
>> Once the ethernet clock has been initialized ( set_rate() and
>> clk_enable() ), we need to take ethernet clock out of reset.
>>
>> This patch is necessary in this series otherwise U-Boot cannot use
>> ethernet and not able To boot.
>>
>> This ethernet reset __prci_ethernet_release_reset() is not depend on SPL or
>U-Boot proper.
>> Right now, U-Boot proper is using ethernet so this gets called only
>> for U-Boot proper and if SPL wants to use ethernet then function helps to
>take clock out of reset.
>
>But will __prci_ethernet_release_reset is called in SPL?

Right now no but if SPL wants to use ethernet in future then this function gets called.