[RESEND PATCH v2 05/11] net: dwc_eth_qos: Split eqos_start() to get link speed

[Patrice CHOTARD]

one typo below

On 5/12/20 11:57 AM, David Wu wrote:
> For Rockchip, need to obtain the current link speed to
> configure the tx clocks, (for example, in rgmii mode,
> 1000M link: 125M, 100M link: 25M, 10M link is 2.5M rate)
> and then enable gmac. So after the adjust_link(), before
> the start gamc, this intermediate stage needs to configure
Typo gamc
> the clock according to the current link speed.
>
> Signed-off-by: David Wu <david.wu at rock-chips.com>
> ---
>
> Changes in v2:
> - None
>
>  drivers/net/dwc_eth_qos.c | 56 ++++++++++++++++++++++++++-------------
>  1 file changed, 38 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
> index bec9bf556b..e503be5b4b 100644
> --- a/drivers/net/dwc_eth_qos.c
> +++ b/drivers/net/dwc_eth_qos.c
> @@ -1175,19 +1175,15 @@ static int eqos_read_rom_hwaddr(struct udevice *dev)
>  	return !is_valid_ethaddr(pdata->enetaddr);
>  }
>  
> -static int eqos_start(struct udevice *dev)
> +static int eqos_init(struct udevice *dev)
>  {
>  	struct eqos_priv *eqos = dev_get_priv(dev);
> -	int ret, i;
> +	int ret;
>  	ulong rate;
> -	u32 val, tx_fifo_sz, rx_fifo_sz, tqs, rqs, pbl;
> -	ulong last_rx_desc;
> +	u32 val;
>  
>  	debug("%s(dev=%p):\n", __func__, dev);
>  
> -	eqos->tx_desc_idx = 0;
> -	eqos->rx_desc_idx = 0;
> -
>  	ret = eqos->config->ops->eqos_start_clks(dev);
>  	if (ret < 0) {
>  		pr_err("eqos_start_clks() failed: %d", ret);
> @@ -1273,6 +1269,30 @@ static int eqos_start(struct udevice *dev)
>  		goto err_shutdown_phy;
>  	}
>  
> +	debug("%s: OK\n", __func__);
> +	return 0;
> +
> +err_shutdown_phy:
> +	phy_shutdown(eqos->phy);
> +err_stop_resets:
> +	eqos->config->ops->eqos_stop_resets(dev);
> +err_stop_clks:
> +	eqos->config->ops->eqos_stop_clks(dev);
> +err:
> +	pr_err("FAILED: %d", ret);
> +	return ret;
> +}
> +
> +static void eqos_enable(struct udevice *dev)
> +{
> +	struct eqos_priv *eqos = dev_get_priv(dev);
> +	u32 val, tx_fifo_sz, rx_fifo_sz, tqs, rqs, pbl;
> +	ulong last_rx_desc;
> +	int i;
> +
> +	eqos->tx_desc_idx = 0;
> +	eqos->rx_desc_idx = 0;
> +
>  	/* Configure MTL */
>  	writel(0x60, &eqos->mtl_regs->txq0_quantum_weight - 0x100);
>  
> @@ -1492,19 +1512,19 @@ static int eqos_start(struct udevice *dev)
>  	writel(last_rx_desc, &eqos->dma_regs->ch0_rxdesc_tail_pointer);
>  
>  	eqos->started = true;
> +}
>  
> -	debug("%s: OK\n", __func__);
> -	return 0;
> +static int eqos_start(struct udevice *dev)
> +{
> +	int ret;
>  
> -err_shutdown_phy:
> -	phy_shutdown(eqos->phy);
> -err_stop_resets:
> -	eqos->config->ops->eqos_stop_resets(dev);
> -err_stop_clks:
> -	eqos->config->ops->eqos_stop_clks(dev);
> -err:
> -	pr_err("FAILED: %d", ret);
> -	return ret;
> +	ret = eqos_init(dev);
> +	if (ret)
> +		return ret;
> +
> +	eqos_enable(dev);
> +
> +	return 0;
>  }
>  
>  static void eqos_stop(struct udevice *dev)

Reviewed-by: Patrice Chotard <patrice.chotard at st.com>

Thanks