[PATCH v10 07/18] sifive: dts: fu540: Add DDR controller and phy register settings
Bin Meng
bmeng.cn at gmail.com
Sun May 17 14:59:25 CEST 2020
On Thu, May 14, 2020 at 7:54 PM Pragnesh Patel
<pragnesh.patel at sifive.com> wrote:
>
> Add DDR controller and phy register settings, taken from fsbl
> (https://github.com/sifive/freedom-u540-c000-bootloader.git)
>
> Signed-off-by: Pragnesh Patel <pragnesh.patel at sifive.com>
> ---
> .../dts/fu540-hifive-unleashed-a00-ddr.dtsi | 1489 +++++++++++++++++
> 1 file changed, 1489 insertions(+)
> create mode 100644 arch/riscv/dts/fu540-hifive-unleashed-a00-ddr.dtsi
>
Tested-by: Bin Meng <bmeng.cn at gmail.com>
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