[PATCH v3 10/17] mtd: spi-nor-core: Get command opcode extension type from BFPT
Pragnesh Patel
pragnesh.patel at sifive.com
Mon May 18 16:31:26 CEST 2020
Hi Pratyush,
>-----Original Message-----
>From: U-Boot <u-boot-bounces at lists.denx.de> On Behalf Of Pratyush Yadav
>Sent: 30 March 2020 21:16
>To: Jagan Teki <jagan at amarulasolutions.com>; Vignesh Raghavendra
><vigneshr at ti.com>
>Cc: Pratyush Yadav <p.yadav at ti.com>; u-boot at lists.denx.de; Sekhar Nori
><nsekhar at ti.com>
>Subject: [PATCH v3 10/17] mtd: spi-nor-core: Get command opcode extension
>type from BFPT
>
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>
>Some devices in DTR mode expect an extra command byte called the
>extension. The extension can either be same as the opcode, bitwise inverse of
>the opcode, or another additional byte forming a 16-byte opcode. Get the
>extension type from the BFPT. For now, only flashes with "repeat" and
>"inverse" extensions are supported.
>
>As of JESD216D.01, BFPT is 20 DWORDs, so update the table size to reflect
>that.
>
>Signed-off-by: Pratyush Yadav <p.yadav at ti.com>
>---
> drivers/mtd/spi/spi-nor-core.c | 28 ++++++++++++++++++++++++++--
> 1 file changed, 26 insertions(+), 2 deletions(-)
>
>diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
>index d3f05e1ded..684a8c3216 100644
>--- a/drivers/mtd/spi/spi-nor-core.c
>+++ b/drivers/mtd/spi/spi-nor-core.c
>@@ -75,11 +75,11 @@ struct sfdp_header {
> /* Basic Flash Parameter Table */
>
> /*
>- * JESD216 rev B defines a Basic Flash Parameter Table of 16 DWORDs.
>+ * JESD216 rev D defines a Basic Flash Parameter Table of 20 DWORDs.
> * They are indexed from 1 but C arrays are indexed from 0.
> */
> #define BFPT_DWORD(i) ((i) - 1)
>-#define BFPT_DWORD_MAX 16
>+#define BFPT_DWORD_MAX 20
If we will change this according to rev D then you should also consider other revisions (rev B) because
below condition will return 0 for revisions lower than rev D.
static int spi_nor_parse_bfpt() {
......
1943 /* Stop here if not JESD216 rev A or later. */
1944 if (bfpt_header->length < BFPT_DWORD_MAX)
1945 return 0;
.....
}
For flashes which does not support rev D will return from here.
>
> /* The first version of JESB216 defined only 9 DWORDs. */
> #define BFPT_DWORD_MAX_JESD216 9
>@@ -144,6 +144,12 @@ struct sfdp_header {
> #define BFPT_DWORD15_QER_SR2_BIT1_NO_RD (0x4UL << 20)
> #define BFPT_DWORD15_QER_SR2_BIT1 (0x5UL << 20) /* Spansion */
>
>+#define BFPT_DWORD18_CMD_EXT_MASK GENMASK(30, 29)
>+#define BFPT_DWORD18_CMD_EXT_REP (0x0UL << 29) /* Repeat */
>+#define BFPT_DWORD18_CMD_EXT_INV (0x1UL << 29) /* Invert */
>+#define BFPT_DWORD18_CMD_EXT_RES (0x2UL << 29) /* Reserved
>*/
>+#define BFPT_DWORD18_CMD_EXT_16B (0x3UL << 29) /* 16-bit
>opcode */
>+
> struct sfdp_bfpt {
> u32 dwords[BFPT_DWORD_MAX];
> };
>@@ -2021,6 +2027,24 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor,
> return -EINVAL;
> }
>
>+ /* 8D-8D-8D command extension. */
>+ switch (bfpt.dwords[BFPT_DWORD(18)] &
>BFPT_DWORD18_CMD_EXT_MASK) {
>+ case BFPT_DWORD18_CMD_EXT_REP:
>+ nor->cmd_ext_type = SPI_NOR_EXT_REPEAT;
>+ break;
>+
>+ case BFPT_DWORD18_CMD_EXT_INV:
>+ nor->cmd_ext_type = SPI_NOR_EXT_INVERT;
>+ break;
>+
>+ case BFPT_DWORD18_CMD_EXT_RES:
>+ return -EINVAL;
>+
>+ case BFPT_DWORD18_CMD_EXT_16B:
>+ dev_err(nor->dev, "16-bit opcodes not supported\n");
>+ return -ENOTSUPP;
>+ }
>+
> return spi_nor_post_bfpt_fixups(nor, bfpt_header, &bfpt, params); }
>
>--
>2.25.0
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