[PATCH v11 00/18] RISC-V SiFive FU540 support SPL
Bin Meng
bmeng.cn at gmail.com
Wed May 20 15:45:22 CEST 2020
Hi Pragnesh,
On Wed, May 20, 2020 at 7:52 PM Pragnesh Patel
<pragnesh.patel at sifive.com> wrote:
>
> Hi Bin,
>
> >-----Original Message-----
> >From: Bin Meng <bmeng.cn at gmail.com>
> >Sent: 20 May 2020 15:54
> >To: Pragnesh Patel <pragnesh.patel at sifive.com>
> >Cc: Rick Chen <rickchen36 at gmail.com>; Jagan Teki
> ><jagan at amarulasolutions.com>; Sean Anderson <seanga2 at gmail.com>; U-
> >Boot Mailing List <u-boot at lists.denx.de>; rick <rick at andestech.com>; Alan
> >Kao <alankao at andestech.com>
> >Subject: Re: [PATCH v11 00/18] RISC-V SiFive FU540 support SPL
> >
> >[External Email] Do not click links or attachments unless you recognize the
> >sender and know the content is safe
> >
> >Hi Pragnesh,
> >
> >On Wed, May 20, 2020 at 3:41 PM Pragnesh Patel
> ><pragnesh.patel at sifive.com> wrote:
> >>
> >> Hi Bin,
> >>
> >> >-----Original Message-----
> >> >From: Bin Meng <bmeng.cn at gmail.com>
> >> >Sent: 20 May 2020 13:07
> >> >To: Pragnesh Patel <pragnesh.patel at sifive.com>
> >> >Cc: Rick Chen <rickchen36 at gmail.com>; Jagan Teki
> >> ><jagan at amarulasolutions.com>; Sean Anderson <seanga2 at gmail.com>;
> >U-
> >> >Boot Mailing List <u-boot at lists.denx.de>; rick <rick at andestech.com>;
> >> >Alan Kao <alankao at andestech.com>
> >> >Subject: Re: [PATCH v11 00/18] RISC-V SiFive FU540 support SPL
> >> >
> >> >[External Email] Do not click links or attachments unless you
> >> >recognize the sender and know the content is safe
> >> >
> >> >"Hi Pragnesh,
> >> >
> >> >On Wed, May 20, 2020 at 3:29 PM Pragnesh Patel
> >> ><pragnesh.patel at sifive.com> wrote:
> >> >>
> >> >>
> >> >>
> >> >> >-----Original Message-----
> >> >> >From: Rick Chen <rickchen36 at gmail.com>
> >> >> >Sent: 20 May 2020 08:38
> >> >> >To: Bin Meng <bmeng.cn at gmail.com>; Pragnesh Patel
> >> >> ><pragnesh.patel at sifive.com>; Jagan Teki
> >> >> ><jagan at amarulasolutions.com>; Sean Anderson
> ><seanga2 at gmail.com>
> >> >> >Cc: U-Boot Mailing List <u-boot at lists.denx.de>; rick
> >> >> ><rick at andestech.com>; Alan Kao <alankao at andestech.com>
> >> >> >Subject: Re: [PATCH v11 00/18] RISC-V SiFive FU540 support SPL
> >> >> >
> >> >> >[External Email] Do not click links or attachments unless you
> >> >> >recognize the sender and know the content is safe
> >> >> >
> >> >> >Hi Bin
> >> >> >
> >> >> >> -----Original Message-----
> >> >> >> From: Bin Meng [mailto:bmeng.cn at gmail.com]
> >> >> >> Sent: Tuesday, May 19, 2020 4:44 PM
> >> >> >> To: Pragnesh Patel; Rick Jian-Zhi Chen(陳建志)
> >> >> >> Subject: Re: [PATCH v11 00/18] RISC-V SiFive FU540 support SPL
> >> >> >>
> >> >> >> Hi Rick,
> >> >> >>
> >> >> >> On Tue, May 19, 2020 at 3:04 PM Pragnesh Patel
> >> >> ><pragnesh.patel at sifive.com> wrote:
> >> >> >> >
> >> >> >> > This series add support for SPL to FU540. U-Boot SPL can boot
> >> >> >> > from
> >> >> >> > L2 LIM (0x0800_0000) and jump to OpenSBI(FW_DYNAMIC
> >firmware)
> >> >and
> >> >> >> > U-Boot proper from MMC devices.
> >> >> >> >
> >> >> >> > This series depends on:
> >> >> >> > [1] https://patchwork.ozlabs.org/patch/1281853
> >> >> >> > [2] https://patchwork.ozlabs.org/patch/1281852
> >> >> >> >
> >> >> >> > All these together is available for testing here [3] [3]
> >> >> >> > https://github.com/pragnesh26992/u-boot/tree/spl
> >> >> >> >
> >> >> >> > How to test this patch:
> >> >> >> > 1) Go to OpenSBI-dir : make PLATFORM=generic FW_DYNAMIC=y
> >> >> >> > 2) export
> >> >> >> >
> >> >>
> >>
> >>>OPENSBI=<path/to/opensbi/build/platform/generic/firmware/fw_dynami
> >c.
> >> >> >> > bi
> >> >> >> > n>
> >> >> >> > 3) Change to u-boot-dir
> >> >> >> > 4) make sifive_fu540_defconfig
> >> >> >> > 5) make all
> >> >> >> > 6) Format the SD card (make sure the disk has GPT, otherwise
> >> >> >> > use gdisk to switch)
> >> >> >> >
> >> >> >> > # sudo sgdisk --clear \
> >> >> >> > > --set-alignment=2 \
> >> >> >> > > --new=1:34:2081 --change-name=1:loader1
> >> >> >> > --typecode=1:5B193300-
> >> >> >FC78-40CD-8002-E86C45580B47 \
> >> >> >> > > --new=2:2082:10273 --change-name=2:loader2 --
> >> >> >typecode=2:2E54B353-1271-4842-806F-E436D6AF6985 \
> >> >> >> > > --new=3:10274: --change-name=3:rootfs
> >> >> >> > --typecode=3:0FC63DAF-
> >> >> >8483-4772-8E79-3D69D8477DE4 \
> >> >> >> > > /dev/sda
> >> >> >> >
> >> >> >> > 7) sudo dd if=spl/u-boot-spl.bin of=/dev/sda seek=34
> >> >> >> > 8) sudo dd if=u-boot.itb of=/dev/sda seek=2082
> >> >> >> >
> >> >> >> > Changes in v11:
> >> >> >> > - Remove TPL related code and OF_PLATDATA from FU540
> >> >> >> > DDR driver (drivers/ram/sifive/fu540_ddr.c)
> >> >> >> > - Update FU540 doc (doc/board/sifive/fu540.rst)
> >> >> >> > Remove unnecessary print
> >> >> >>
> >> >> >> Could we get this v11 applied as soon as possible for v2020.07?
> >> >> >
> >> >> >No problem, if everything is OK, I will applied ASAP.
> >> >> >But Jagan seem have some responses, please check about it.
> >> >> >
> >> >> >>
> >> >> >> > This series depends on:
> >> >> >> > [1] https://patchwork.ozlabs.org/patch/1281853
> >> >> >> > [2] https://patchwork.ozlabs.org/patch/1281852
> >> >>
> >> >> With " assigned-clocks" and " assigned-clock-rates" for cpus, this
> >> >> FU540 SPL series is no more depend on the above patches.
> >> >>
> >> >> cpus {
> >> >> assigned-clocks = <&prci PRCI_CLK_COREPLL>;
> >> >> assigned-clock-rates = <1000000000>; .....
> >> >> }
> >> >>
> >> >> I will update the series dependency in v12. Thanks to @Sean
> >> >> Anderson for
> >> >the suggestion.
> >> >>
> >> >
> >> >Are these "assigned-clocks" and "assigned-clock-rates" bindings the
> >> >suggested ones by the Linux kernel upstream?
> >>
> >> https://patchwork.ozlabs.org/project/uboot/patch/20200502100628.24809-
> >> 17-pragnesh.patel at sifive.com/
> >
> >I see. "assigned-clocks" is only needed for U-Boot.
> >
> >Do we still need "clocks" in each cpu node?
>
> Right now, "cpu detail" shows wrong frequency in U-Boot for FU540.
> This https://patchwork.ozlabs.org/project/uboot/patch/20200503024637.327733-18-seanga2@gmail.com/ patch solves that problem.
>
> For this patch, we need "clocks" in each cpu node.
Thanks. So for SPL booting this series does not depend on Sean's
patches, but for "cpu detail" to show correct frequency, Sean's
patches are still needed.
Regards,
Bin
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