[PATCH] clk: rk3399: Fix eMMC get_clk reg offset

Kever Yang kever.yang at rock-chips.com
Mon May 25 04:48:57 CEST 2020


On 2020/5/25 上午12:43, Jagan Teki wrote:
> Actual eMMC get_clk register is clksel_con22 instead of
> clksel_con21.
>
> Fix it.
>
> Signed-off-by: Jagan Teki <jagan at amarulasolutions.com>

Reviewed-by: Kever Yang <kever.yang at rock-chips.com>

Thanks,
- Kever
> ---
>   drivers/clk/rockchip/clk_rk3399.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
> index 6a78837619..4caf3b5617 100644
> --- a/drivers/clk/rockchip/clk_rk3399.c
> +++ b/drivers/clk/rockchip/clk_rk3399.c
> @@ -728,7 +728,7 @@ static ulong rk3399_mmc_get_clk(struct rockchip_cru *cru, uint clk_id)
>   		div = 2;
>   		break;
>   	case SCLK_EMMC:
> -		con = readl(&cru->clksel_con[21]);
> +		con = readl(&cru->clksel_con[22]);
>   		div = 1;
>   		break;
>   	default:




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