[PATCH 2/5] ARM: stm32: Hog GPIO PF7 high on DHCOR to unlock SPI NOR nWP

[Marek Vasut]

The SPI NOR nWP line is connected to GPIO PF7 on the SoM,
pull the GPIO line high by default to clear SPI NOR WP.

Signed-off-by: Marek Vasut <marex at denx.de>
Cc: Patrick Delaunay <patrick.delaunay at st.com>
Cc: Patrice Chotard <patrice.chotard at st.com>
---
 arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi | 9 +++++++++
 configs/stm32mp15_dhcor_basic_defconfig    | 1 +
 2 files changed, 10 insertions(+)

diff --git a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi
index ef730a8322..bd4c2adc35 100644
--- a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi
@@ -21,6 +21,15 @@
 	};
 };
 
+&gpiof {
+	snor-nwp {
+		gpio-hog;
+		gpios = <7 0>;
+		output-high;
+		line-name = "spi-nor-nwp";
+	};
+};
+
 &i2c4 {
 	u-boot,dm-pre-reloc;
 };
diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig
index 7163d0ad1b..249646c449 100644
--- a/configs/stm32mp15_dhcor_basic_defconfig
+++ b/configs/stm32mp15_dhcor_basic_defconfig
@@ -71,6 +71,7 @@ CONFIG_SPL_BLOCK_CACHE=y
 CONFIG_DFU_MMC=y
 CONFIG_DFU_RAM=y
 CONFIG_DFU_VIRT=y
+CONFIG_GPIO_HOG=y
 CONFIG_DM_HWSPINLOCK=y
 CONFIG_HWSPINLOCK_STM32=y
 CONFIG_DM_I2C=y
-- 
2.25.1