[PATCH 2/3] x86: spi: Rewrite logic for obtaining the SPI memory map

Bin Meng bmeng.cn at gmail.com
Tue May 26 12:08:31 CEST 2020

Hi Simon,

On Mon, May 18, 2020 at 11:01 AM Simon Glass <sjg at chromium.org> wrote:
> At present this logic does not work on link and samus, since their SPI
> controller is not a PCI device, but a child of the PCH.
> Unfortunately, fixing this involves a lot of extra logic. Still, this was
> requested in the review of the fix-up patch, so here it is.

This patch still does not fix the issue completely.

In mrccache_get_region() the call to
uclass_find_first_device(UCLASS_SPI_FLASH, &dev) finds nothing. The
commit changed the behavior is this one:

commit 87f1084a630e6dbd5ba9a9747ce185d98ed40658
Author: Simon Glass <sjg at chromium.org>
Date:   Fri Dec 6 21:42:03 2019 -0700

    x86: Adjust mrccache_get_region() to use livetree

    Change the algorithm to first find the flash device then read the
    properties using the livetree API. With this change the device is not
    probed so this needs to be done in mrccache_save().

Previously fdtdec APIs are used to get the MRC cache range, but now
since it switches to live tree, a dev node has to be passed hence the
call to uclass_find_first_device(UCLASS_SPI_FLASH, &dev) but at this
point nothing is probed.

> Signed-off-by: Simon Glass <sjg at chromium.org>
> Fixes: 92842147c31 ("spi: ich: Add support for get_mmap() method")
> ---
>  drivers/spi/ich.c | 103 +++++++++++++++++++++++++++++++++++++++-------
>  1 file changed, 88 insertions(+), 15 deletions(-)


More information about the U-Boot mailing list