[U-boot, 1/2] eth: mtk-eth: enable mt7629 sgmii mode support in mediatek eth driver

MarkLee Mark-MC.Lee at mediatek.com
Wed May 27 13:25:05 CEST 2020


The sgmii mode init flow is almost the same for all mediatek SoC, the
only difference is the register offset(SGMSYS_GEN2_SPEED) is 0x2028
for old chip(mt7622) but changed to 0x128 for newer chip(mt7629 and
the following chips).

Signed-off-by: MarkLee <Mark-MC.Lee at mediatek.com>
---
 drivers/net/mtk_eth.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/net/mtk_eth.h b/drivers/net/mtk_eth.h
index f2940c9996..3c85eab91a 100644
--- a/drivers/net/mtk_eth.h
+++ b/drivers/net/mtk_eth.h
@@ -44,7 +44,12 @@
 #define SGMSYS_QPHY_PWR_STATE_CTRL	0xe8
 #define SGMII_PHYA_PWD			BIT(4)
 
+#if defined(CONFIG_TARGET_MT7622)
 #define SGMSYS_GEN2_SPEED		0x2028
+#else
+#define SGMSYS_GEN2_SPEED		0x128
+#endif
+
 #define SGMSYS_SPEED_2500		BIT(2)
 
 /* Frame Engine Registers */
-- 
2.17.1


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