[PATCH 1/2] sun8i-emac: sun8i-v3s compatibility for sun8i-emac

[Benedikt-Alexander Mokroß]

This patch expands the sun8i-emac driver to support the V3s.
For this the CLK and RST gates for EMAC and EPHY were added in clk_v3s.c.

Signed-off-by: Benedikt-Alexander Mokroß <u-boot at bamkrs.de>
---
  drivers/clk/sunxi/clk_v3s.c | 10 ++++++++--
  drivers/net/sun8i_emac.c    | 19 +++++++++++++------
  2 files changed, 21 insertions(+), 8 deletions(-)

diff --git a/drivers/clk/sunxi/clk_v3s.c b/drivers/clk/sunxi/clk_v3s.c
index b79446cc4f..bf870f3ded 100644
--- a/drivers/clk/sunxi/clk_v3s.c
+++ b/drivers/clk/sunxi/clk_v3s.c
@@ -17,6 +17,7 @@ static struct ccu_clk_gate v3s_gates[] = {
  	[CLK_BUS_MMC0]		= GATE(0x060, BIT(8)),
  	[CLK_BUS_MMC1]		= GATE(0x060, BIT(9)),
  	[CLK_BUS_MMC2]		= GATE(0x060, BIT(10)),
+	[CLK_BUS_EMAC]		= GATE(0x060, BIT(17)),
  	[CLK_BUS_SPI0]		= GATE(0x060, BIT(20)),
  	[CLK_BUS_OTG]		= GATE(0x060, BIT(24)),
  
@@ -24,9 +25,11 @@ static struct ccu_clk_gate v3s_gates[] = {
  	[CLK_BUS_UART1]		= GATE(0x06c, BIT(17)),
  	[CLK_BUS_UART2]		= GATE(0x06c, BIT(18)),
  
-	[CLK_SPI0]		= GATE(0x0a0, BIT(31)),
+	[CLK_BUS_EPHY]		= GATE(0x070, BIT(0)),
  
-	[CLK_USB_PHY0]          = GATE(0x0cc, BIT(8)),
+	[CLK_SPI0]			= GATE(0x0a0, BIT(31)),
+
+	[CLK_USB_PHY0]		= GATE(0x0cc, BIT(8)),
  };
  
  static struct ccu_reset v3s_resets[] = {
@@ -35,12 +38,15 @@ static struct ccu_reset v3s_resets[] = {
  	[RST_BUS_MMC0]		= RESET(0x2c0, BIT(8)),
  	[RST_BUS_MMC1]		= RESET(0x2c0, BIT(9)),
  	[RST_BUS_MMC2]		= RESET(0x2c0, BIT(10)),
+	[RST_BUS_EMAC]		= RESET(0x2c0, BIT(17)),
  	[RST_BUS_SPI0]		= RESET(0x2c0, BIT(20)),
  	[RST_BUS_OTG]		= RESET(0x2c0, BIT(24)),
  
  	[RST_BUS_UART0]		= RESET(0x2d8, BIT(16)),
  	[RST_BUS_UART1]		= RESET(0x2d8, BIT(17)),
  	[RST_BUS_UART2]		= RESET(0x2d8, BIT(18)),
+
+	[RST_BUS_EPHY]		= RESET(0x2c8, BIT(2)),
  };
  
  static const struct ccu_desc v3s_ccu_desc = {
diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index 99e24c6348..f69b8be957 100644
--- a/drivers/net/sun8i_emac.c
+++ b/drivers/net/sun8i_emac.c
@@ -56,9 +56,11 @@
  #define RX_TOTAL_BUFSIZE	(CONFIG_ETH_BUFSIZE * CONFIG_RX_DESCR_NUM)
  
  #define H3_EPHY_DEFAULT_VALUE	0x58000
+#define V3S_EPHY_DEFAULT_VALUE  0x38000
  #define H3_EPHY_DEFAULT_MASK	GENMASK(31, 15)
  #define H3_EPHY_ADDR_SHIFT	20
  #define REG_PHY_ADDR_MASK	GENMASK(4, 0)
+#define H3_EPHY_CLK_SEL		BIT(18) /* 1: 24MHz, 0: 25MHz */
  #define H3_EPHY_LED_POL		BIT(17)	/* 1: active low, 0: active high */
  #define H3_EPHY_SHUTDOWN	BIT(16)	/* 1: shutdown, 0: power up */
  #define H3_EPHY_SELECT		BIT(15) /* 1: internal PHY, 0: external PHY */
@@ -111,6 +113,7 @@ enum emac_variant {
  	H3_EMAC,
  	A64_EMAC,
  	R40_GMAC,
+	V3S_EMAC,
  };
  
  struct emac_dma_desc {
@@ -278,10 +281,11 @@ static int sun8i_emac_set_syscon_ephy(struct emac_eth_dev *priv, u32 *reg)
  		 * needs to be configured and powered up before use
  		*/
  		*reg &= ~H3_EPHY_DEFAULT_MASK;
-		*reg |=  H3_EPHY_DEFAULT_VALUE;
+		*reg |= ((priv->variant == V3S_EMAC) ? V3S_EPHY_DEFAULT_VALUE :  H3_EPHY_DEFAULT_VALUE);
  		*reg |= priv->phyaddr << H3_EPHY_ADDR_SHIFT;
  		*reg &= ~H3_EPHY_SHUTDOWN;
  		*reg |= H3_EPHY_SELECT;
+		*reg |= H3_EPHY_CLK_SEL;
  	} else
  		/* This is to select External Gigabit PHY on
  		 * the boards with H3 SoC.
@@ -310,14 +314,14 @@ static int sun8i_emac_set_syscon(struct sun8i_eth_pdata *pdata,
  
  	reg = readl(priv->sysctl_reg + 0x30);
  
-	if (priv->variant == H3_EMAC) {
+	if (priv->variant == H3_EMAC || priv->variant == V3S_EMAC) {
  		ret = sun8i_emac_set_syscon_ephy(priv, &reg);
  		if (ret)
  			return ret;
  	}
  
  	reg &= ~(SC_ETCS_MASK | SC_EPIT);
-	if (priv->variant == H3_EMAC || priv->variant == A64_EMAC)
+	if (priv->variant == H3_EMAC || priv->variant == V3S_EMAC || priv->variant == A64_EMAC)
  		reg &= ~SC_RMII_EN;
  
  	switch (priv->interface) {
@@ -837,7 +841,7 @@ static int sun8i_emac_eth_probe(struct udevice *dev)
  
  	sun8i_mdio_init(dev->name, dev);
  	priv->bus = miiphy_get_dev_by_name(dev->name);
-
+	
  	return sun8i_phy_init(priv, dev);
  }
  
@@ -981,7 +985,7 @@ static int sun8i_emac_eth_ofdata_to_platdata(struct udevice *dev)
  		return -EINVAL;
  	}
  
-	if (priv->variant == H3_EMAC) {
+	if (priv->variant == H3_EMAC || priv->variant == V3S_EMAC) {
  		ret = sun8i_get_ephy_nodes(priv);
  		if (ret)
  			return ret;
@@ -1025,13 +1029,16 @@ static int sun8i_emac_eth_ofdata_to_platdata(struct udevice *dev)
  }
  
  static const struct udevice_id sun8i_emac_eth_ids[] = {
-	{.compatible = "allwinner,sun8i-h3-emac", .data = (uintptr_t)H3_EMAC },
+	{.compatible = "allwinner,sun8i-h3-emac",
+		.data = (uintptr_t)H3_EMAC },
  	{.compatible = "allwinner,sun50i-a64-emac",
  		.data = (uintptr_t)A64_EMAC },
  	{.compatible = "allwinner,sun8i-a83t-emac",
  		.data = (uintptr_t)A83T_EMAC },
  	{.compatible = "allwinner,sun8i-r40-gmac",
  		.data = (uintptr_t)R40_GMAC },
+	{.compatible = "allwinner,sun8i-v3s-emac",
+		.data = (uintptr_t)V3S_EMAC },
  	{ }
  };
  
-- 
2.20.1