[PATCH v2 2/4] riscv: dts: hifive-unleashed-a00: add cpu aliases
Pragnesh Patel
pragnesh.patel at sifive.com
Fri May 29 07:32:04 CEST 2020
>-----Original Message-----
>From: Sagar Kadam <sagar.kadam at sifive.com>
>Sent: 26 May 2020 22:39
>To: u-boot at lists.denx.de; rick at andestech.com; lukma at denx.de
>Cc: jagan at amarulasolutions.com; bmeng.cn at gmail.com; Pragnesh Patel
><pragnesh.patel at sifive.com>; seanga2 at gmail.com; Sagar Kadam
><sagar.kadam at sifive.com>
>Subject: [PATCH v2 2/4] riscv: dts: hifive-unleashed-a00: add cpu aliases
>
>Add cpu aliases to U-Boot specific dtsi for hifive-unleashed.
>Without aliases we see that the CPU device sequence numbers are set
>randomly and the cpu list/detail command will show it as follows:
>=> cpu list
> 1: cpu at 0 rv64imac
> 0: cpu at 1 rv64imafdc
> 2: cpu at 2 rv64imafdc
> 3: cpu at 3 rv64imafdc
> 4: cpu at 4 rv64imafdc
>
>Seems like CPU probing with dm-model also relies on aliases as observed in
>case spi. The fu540-c000-u-boot.dtsi has cpu0/1/2/3/4 nodes and so adding
>corresponding aliases we can ensure that cpu devices are assigned proper
>sequence as follows:
>
>=> cpu list
> 0: cpu at 0 rv64imac
> 1: cpu at 1 rv64imafdc
> 2: cpu at 2 rv64imafdc
> 3: cpu at 3 rv64imafdc
> 4: cpu at 4 rv64imafdc
>
>Signed-off-by: Sagar Shrikant Kadam <sagar.kadam at sifive.com>
>---
> arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi | 5 +++++
> 1 file changed, 5 insertions(+)
Reviewed-by: Pragnesh Patel <pragnesh.patel at sifive.com>
More information about the U-Boot
mailing list