[PATCH v13 12/19] riscv: sifive: dts: fu540: set ethernet clock rate

[Bin Meng]

On Fri, May 29, 2020 at 2:05 PM Pragnesh Patel
<pragnesh.patel at sifive.com> wrote:
>
> Set ethernet clock rate to 125 Mhz so that it will work with 1000Mbps,
> Earlier this is done by FSBL. With this change We can remove the
> ethernet clock rate code from FSBL.
>
> Signed-off-by: Pragnesh Patel <pragnesh.patel at sifive.com>
> ---
>  arch/riscv/dts/fu540-c000-u-boot.dtsi | 5 +++++
>  1 file changed, 5 insertions(+)
>

Tested-by: Bin Meng <bmeng.cn at gmail.com>