[PATCH] video: rockchip: Add missing dpcd_write() call to link_train_ce()

[Alper Nebi Yasak]

Found this by comparing it to the coreboot driver, a form of this call
was introduced there in their commit b9a7877568cf ("rockchip/*: refactor
edp driver"). This is copy-pasted from U-Boot's link_train_cr() slightly
above it.

Without this on a gru-kevin chromebook, I have:

    clock recovery at voltage 0 pre-emphasis 0
    requested signal parameters: lane 0 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 1 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 2 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 3 voltage 0.4V pre_emph 3.5dB
    using signal parameters: voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 0 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 1 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 2 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 3 voltage 0.4V pre_emph 3.5dB
    using signal parameters: voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 0 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 1 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 2 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 3 voltage 0.4V pre_emph 3.5dB
    using signal parameters: voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 0 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 1 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 2 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 3 voltage 0.4V pre_emph 3.5dB
    using signal parameters: voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 0 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 1 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 2 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 3 voltage 0.4V pre_emph 3.5dB
    using signal parameters: voltage 0.4V pre_emph 3.5dB
    channel eq failed, ret=-5
    link train failed!
    rk_vop_probe() Device failed: ret=-5

With this, it looks like training succeeds:

    clock recovery at voltage 0 pre-emphasis 0
    requested signal parameters: lane 0 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 1 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 2 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 3 voltage 0.4V pre_emph 3.5dB
    using signal parameters: voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 0 voltage 0.4V pre_emph 6dB
    requested signal parameters: lane 1 voltage 0.4V pre_emph 6dB
    requested signal parameters: lane 2 voltage 0.4V pre_emph 6dB
    requested signal parameters: lane 3 voltage 0.4V pre_emph 6dB
    using signal parameters: voltage 0.4V pre_emph 6dB
    requested signal parameters: lane 0 voltage 0.4V pre_emph 0dB
    requested signal parameters: lane 1 voltage 0.4V pre_emph 0dB
    requested signal parameters: lane 2 voltage 0.4V pre_emph 0dB
    requested signal parameters: lane 3 voltage 0.4V pre_emph 0dB
    using signal parameters: voltage 0.4V pre_emph 0dB
    channel eq at voltage 0 pre-emphasis 0
    config video failed
    rk_vop_probe() Device failed: ret=-110

The "config video failed" error also goes away when I disable higher
log levels, and it claims to have successfully probed the device.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak at gmail.com>
---
I'm testing this with a lot of other patches to make the board work. The
actual tree I'm using is available here:

    https://github.com/alpernebbi/u-boot/commits/rk3399-gru-kevin/wip
    (currently at commit c0dc4b42afe770671ce7bb0dd519d894a3acdea0)

 drivers/video/rockchip/rk_edp.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/video/rockchip/rk_edp.c b/drivers/video/rockchip/rk_edp.c
index 000bd48140..a032eb6889 100644
--- a/drivers/video/rockchip/rk_edp.c
+++ b/drivers/video/rockchip/rk_edp.c
@@ -559,6 +559,12 @@ static int rk_edp_link_train_ce(struct rk_edp_priv *edp)
 	channel_eq = 0;
 	for (tries = 0; tries < 5; tries++) {
 		rk_edp_set_link_training(edp, edp->train_set);
+		ret = rk_edp_dpcd_write(regs, DPCD_TRAINING_LANE0_SET,
+					edp->train_set,
+					edp->link_train.lane_count);
+		if (ret)
+			return ret;
+
 		udelay(400);
 
 		if (rk_edp_dpcd_read_link_status(edp, status) < 0) {
-- 
2.28.0