[PATCH] serial: pl01x: Add error value checking
André Przywara
andre.przywara at arm.com
Thu Oct 15 17:09:49 CEST 2020
On 14/10/2020 09:42, Michal Simek wrote:
Hi,
> There also a need to check return values to make sure that clocks were
> enabled and setup properly.
is that just clean-up or is there a particular problem that's fixed?
I am asking because I am not sure how useful debug output in a console
driver is.
Also in some cases the UART is actually already configured, so failure
to get the clock (due to a sloppy/too complicated DTB) is not really
fatal at the moment.
I am not against this patch, just wanted to make sure we don't break
anything.
Cheers,
Andre
>
> Signed-off-by: Michal Simek <michal.simek at xilinx.com>
> ---
>
> drivers/serial/serial_pl01x.c | 12 +++++++++++-
> 1 file changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c
> index 2772c25f1d2d..8672095ea4de 100644
> --- a/drivers/serial/serial_pl01x.c
> +++ b/drivers/serial/serial_pl01x.c
> @@ -362,8 +362,18 @@ int pl01x_serial_ofdata_to_platdata(struct udevice *dev)
> plat->clock = dev_read_u32_default(dev, "clock", CONFIG_PL011_CLOCK);
> ret = clk_get_by_index(dev, 0, &clk);
> if (!ret) {
> - clk_enable(&clk);
> + ret = clk_enable(&clk);
> + if (ret && ret != -ENOSYS) {
> + dev_err(dev, "failed to enable clock\n");
> + return ret;
> + }
> +
> plat->clock = clk_get_rate(&clk);
> + if (IS_ERR_VALUE(plat->clock)) {
> + dev_err(dev, "failed to get rate\n");
> + return plat->clock;
> + }
> + debug("%s: CLK %d\n", __func__, plat->clock);
> }
> plat->type = dev_get_driver_data(dev);
> plat->skip_init = dev_read_bool(dev, "skip-init");
>
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