[PATCH 04/15] arm64: dts: ls1028a: add gpio node

Biwen Li biwen.li at oss.nxp.com
Fri Oct 16 11:11:59 CEST 2020


From: Biwen Li <biwen.li at nxp.com>

Add gpio node for SoC LS1028A

Signed-off-by: Biwen Li <biwen.li at nxp.com>
---
 arch/arm/dts/fsl-ls1028a.dtsi | 33 +++++++++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi
index bf6373d5ec..64e75c637d 100644
--- a/arch/arm/dts/fsl-ls1028a.dtsi
+++ b/arch/arm/dts/fsl-ls1028a.dtsi
@@ -380,6 +380,39 @@
 		status = "disabled";
 	};
 
+	gpio0: gpio at 2300000 {
+		compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
+		reg = <0x0 0x2300000 0x0 0x10000>;
+		interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+		gpio-controller;
+		#gpio-cells = <2>;
+		interrupt-controller;
+		#interrupt-cells = <2>;
+		little-endian;
+	};
+
+	gpio1: gpio at 2310000 {
+		compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
+		reg = <0x0 0x2310000 0x0 0x10000>;
+		interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+		gpio-controller;
+		#gpio-cells = <2>;
+		interrupt-controller;
+		#interrupt-cells = <2>;
+		little-endian;
+	};
+
+	gpio2: gpio at 2320000 {
+		compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
+		reg = <0x0 0x2320000 0x0 0x10000>;
+		interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+		gpio-controller;
+		#gpio-cells = <2>;
+		interrupt-controller;
+		#interrupt-cells = <2>;
+		little-endian;
+	};
+
 	sata: sata at 3200000 {
 		compatible = "fsl,ls1028a-ahci";
 		reg = <0x0 0x3200000 0x0 0x10000	/* ccsr sata base */
-- 
2.17.1



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