[PATCH 01/15] gpio: mpc8xxx_gpio: fix a bug on ls1046ardb
Biwen Li
biwen.li at nxp.com
Fri Oct 16 11:28:25 CEST 2020
Hi Priyanka,
These patches depend on the patch("[V3] gpio: mpc8xxx: support fsl-layerscape platform"
, https://patchwork.ozlabs.org/project/uboot/patch/20200924134050.8618-1-hui.song_1@nxp.com/),
Best Regads,
Biwen Li
> To: Priyanka Jain <priyanka.jain at nxp.com>
> Cc: Jiafei Pan <jiafei.pan at nxp.com>; u-boot at lists.denx.de; Xiaobo Xie
> <xiaobo.xie at nxp.com>; Biwen Li <biwen.li at nxp.com>
> Subject: [PATCH 01/15] gpio: mpc8xxx_gpio: fix a bug on ls1046ardb
>
> From: Biwen Li <biwen.li at nxp.com>
>
> Fix a bug as belows,
> => gpio status -a
> "Synchronous Abort" handler, esr 0x96000061
> elr: 0000000082047964 lr : 0000000082047960 (reloc)
> elr: 00000000fbd72964 lr : 00000000fbd72960
> x0 : 00000000ffffffff x1 : 000000000000000a
> x2 : 0000000000000020 x3 : 0000000000000001
> x4 : 0000000000000000 x5 : 0000000000000030
> x6 : 0000000000000020 x7 : 0000000000000002
> x8 : 00000000ffffffe0 x9 : 0000000000000008
> x10: 0000000000000010 x11: 0000000000000006
> x12: 000000000001869f x13: 0000000000000230
> x14: 00000000fbc23e9c x15: 00000000ffffffff ...
> reseting
>
> Signed-off-by: Biwen Li <biwen.li at nxp.com>
> ---
> .../asm/arch-fsl-layerscape/immap_lsch3.h | 10 +++++
> drivers/gpio/mpc8xxx_gpio.c | 45 +++----------------
> 2 files changed, 17 insertions(+), 38 deletions(-)
>
> diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
> b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
> index baa9fa8529..3d02004036 100644
> --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
> +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
> @@ -589,5 +589,15 @@ struct ccsr_serdes {
> u8 res5[0x19fc - 0xa00];
> };
>
> +struct ccsr_gpio {
> + u32 gpdir;
> + u32 gpodr;
> + u32 gpdat;
> + u32 gpier;
> + u32 gpimr;
> + u32 gpicr;
> + u32 gpibe;
> +};
> +
> #endif /*__ASSEMBLY__ */
> #endif /* __ARCH_FSL_LSCH3_IMMAP_H_ */
> diff --git a/drivers/gpio/mpc8xxx_gpio.c b/drivers/gpio/mpc8xxx_gpio.c index
> 27881a7322..e7fc45d4f5 100644
> --- a/drivers/gpio/mpc8xxx_gpio.c
> +++ b/drivers/gpio/mpc8xxx_gpio.c
> @@ -16,16 +16,6 @@
> #include <asm/io.h>
> #include <dm/of_access.h>
>
> -struct ccsr_gpio {
> - u32 gpdir;
> - u32 gpodr;
> - u32 gpdat;
> - u32 gpier;
> - u32 gpimr;
> - u32 gpicr;
> - u32 gpibe;
> -};
> -
> struct mpc8xxx_gpio_data {
> /* The bank's register base in memory */
> struct ccsr_gpio __iomem *base;
> @@ -187,32 +177,11 @@ static int mpc8xxx_gpio_ofdata_to_platdata(struct
> udevice *dev) {
> struct mpc8xxx_gpio_plat *plat = dev_get_platdata(dev);
> struct mpc8xxx_gpio_data *data = dev_get_priv(dev);
> - fdt_addr_t addr;
> - u32 i;
> - u32 reg[4];
>
> - if (ofnode_read_bool(dev->node, "little-endian"))
> + if (dev_read_bool(dev, "little-endian"))
> data->little_endian = true;
>
> - if (data->little_endian)
> - dev_read_u32_array(dev, "reg", reg, 4);
> - else
> - dev_read_u32_array(dev, "reg", reg, 2);
> -
> - if (data->little_endian) {
> - for (i = 0; i < 2; i++)
> - reg[i] = be32_to_cpu(reg[i]);
> - }
> -
> - addr = dev_translate_address(dev, reg);
> -
> - plat->addr = addr;
> -
> - if (data->little_endian)
> - plat->size = reg[3];
> - else
> - plat->size = reg[1];
> -
> + plat->addr = (ulong)dev_read_addr_size_index(dev, 0 , (fdt_size_t
> +*)&plat->size);
> plat->ngpios = dev_read_u32_default(dev, "ngpios", 32);
>
> return 0;
> @@ -257,11 +226,11 @@ static int mpc8xxx_gpio_probe(struct udevice *dev)
> if (!str)
> return -ENOMEM;
>
> - if (ofnode_device_is_compatible(dev->node, "fsl,qoriq-gpio")) {
> - unsigned long gpibe = data->addr + sizeof(struct ccsr_gpio)
> - - sizeof(u32);
> -
> - out_be32((unsigned int *)gpibe, 0xffffffff);
> + if (device_is_compatible(dev, "fsl,qoriq-gpio")) {
> + if (data->little_endian)
> + out_le32(&data->base->gpibe, 0xffffffff);
> + else
> + out_be32(&data->base->gpibe, 0xffffffff);
> }
>
> uc_priv->bank_name = str;
> --
> 2.17.1
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