[PATCH v2 1/8] Revert "mmc: zynq: parse dt when probing"

[Jaehoon Chung]

On 10/23/20 8:14 PM, Michal Simek wrote:
> From: Ashok Reddy Soma <ashok.reddy.soma at xilinx.com>
> 
> This reverts commit 942b5fc03218d1c94468fc658e7dec65dabcc830.
> 
> This is partial revert of the above commit.
> 
> mmc_of_parse() is reading no-1-8-v from device tree and if set,
> it is clearing the UHS speed capabilities of cfg->host_caps.
> cfg->host_caps &= ~(UHS_CAPS | MMC_MODE_HS200 |
> 		    MMC_MODE_HS400 | MMC_MODE_HS400_ES);
> 
> This is still missing to clear UHS speeds like SDHCI_SUPPORT_SDR104,
> SDHCI_SUPPORT_SDR50 and SDHCI_SUPPORT_DDR50.
> 
> Even if we clear the flags SDHCI_SUPPORT_XXX in mmc_of_parse(),
> these speed flags are getting set again in cfg->host_caps in
> sdhci_setup_cfg().
> 
> The reason for this is, SDHCI_SUPPORT_XXX flags are cleared
> only if controller is not capable of supporting MMC_VDD_165_195 volts.
> 
> if (caps & SDHCI_CAN_VDD_180)
> 	cfg->voltages |= MMC_VDD_165_195;
> 
> if (!(cfg->voltages & MMC_VDD_165_195))
> 	caps_1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
> 		    SDHCI_SUPPORT_DDR50);
> 
> It means "no-1-8-v", which is read from DT is not coming in to effect.
> So it is better we keep the host quirks(SDHCI_QUIRK_NO_1_8_V) to
> clear UHS speeds based on no-1-8-v from device tree.
> 
> Hence revert the functionality related to no-1-8-v only, rest is fine
> in the patch.
> 
> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma at xilinx.com>
> Signed-off-by: Michal Simek <michal.simek at xilinx.com>

Reviewed-by: Jaehoon Chung <jh80.chung at samsung.com>

Best Regards,
Jaehoon Chung

> ---
> 
> (no changes since v1)
> 
>  drivers/mmc/sdhci.c      | 3 ++-
>  drivers/mmc/zynq_sdhci.c | 5 +++++
>  include/sdhci.h          | 1 +
>  3 files changed, 8 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
> index d549a264d73b..06289343124e 100644
> --- a/drivers/mmc/sdhci.c
> +++ b/drivers/mmc/sdhci.c
> @@ -812,7 +812,8 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host,
>  		cfg->host_caps &= ~MMC_MODE_HS_52MHz;
>  	}
>  
> -	if (!(cfg->voltages & MMC_VDD_165_195))
> +	if (!(cfg->voltages & MMC_VDD_165_195) ||
> +	    (host->quirks & SDHCI_QUIRK_NO_1_8_V))
>  		caps_1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
>  			    SDHCI_SUPPORT_DDR50);
>  
> diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
> index 775c17baac5b..88e478ee11c1 100644
> --- a/drivers/mmc/zynq_sdhci.c
> +++ b/drivers/mmc/zynq_sdhci.c
> @@ -28,6 +28,7 @@ struct arasan_sdhci_priv {
>  	struct sdhci_host *host;
>  	u8 deviceid;
>  	u8 bank;
> +	u8 no_1p8;
>  };
>  
>  #if defined(CONFIG_ARCH_ZYNQMP)
> @@ -236,6 +237,9 @@ static int arasan_sdhci_probe(struct udevice *dev)
>  	host->quirks |= SDHCI_QUIRK_BROKEN_HISPD_MODE;
>  #endif
>  
> +	if (priv->no_1p8)
> +		host->quirks |= SDHCI_QUIRK_NO_1_8_V;
> +
>  	plat->cfg.f_max = CONFIG_ZYNQ_SDHCI_MAX_FREQ;
>  
>  	ret = mmc_of_parse(dev, &plat->cfg);
> @@ -277,6 +281,7 @@ static int arasan_sdhci_ofdata_to_platdata(struct udevice *dev)
>  
>  	priv->deviceid = dev_read_u32_default(dev, "xlnx,device_id", -1);
>  	priv->bank = dev_read_u32_default(dev, "xlnx,mio-bank", 0);
> +	priv->no_1p8 = dev_read_bool(dev, "no-1-8-v");
>  
>  	return 0;
>  }
> diff --git a/include/sdhci.h b/include/sdhci.h
> index f69d5f81fb1b..1fd20ec0860b 100644
> --- a/include/sdhci.h
> +++ b/include/sdhci.h
> @@ -244,6 +244,7 @@
>  #define SDHCI_QUIRK_BROKEN_HISPD_MODE	BIT(5)
>  #define SDHCI_QUIRK_WAIT_SEND_CMD	(1 << 6)
>  #define SDHCI_QUIRK_USE_WIDE8		(1 << 8)
> +#define SDHCI_QUIRK_NO_1_8_V		(1 << 9)
>  
>  /* to make gcc happy */
>  struct sdhci_host;
>