[PATCH] arm64: versal: Update mini u-boot eMMC node parameters
Michal Simek
monstr at monstr.eu
Tue Oct 27 08:14:04 CET 2020
st 7. 10. 2020 v 9:53 odesílatel Michal Simek <michal.simek at xilinx.com> napsal:
>
> From: Ashok Reddy Soma <ashok.reddy.soma at xilinx.com>
>
> Mini u-boot eMMC dt parameters are not in sync with full u-boot dt.
>
> Frequency for eMMC is fixed to 25Mhz. Due to this, mmc multi-block write
> commands are failing. Increase frequency to 200Mhz to fix this issue.
>
> Add bus-width = <8>, non-removable and disable-wp properties to the node
> as this is eMMC.
>
> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma at xilinx.com>
> Signed-off-by: Michal Simek <michal.simek at xilinx.com>
> ---
>
> arch/arm/dts/versal-mini-emmc0.dts | 9 ++++++---
> arch/arm/dts/versal-mini-emmc1.dts | 9 ++++++---
> 2 files changed, 12 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/dts/versal-mini-emmc0.dts b/arch/arm/dts/versal-mini-emmc0.dts
> index 7826a282134b..6a6e7467a233 100644
> --- a/arch/arm/dts/versal-mini-emmc0.dts
> +++ b/arch/arm/dts/versal-mini-emmc0.dts
> @@ -16,10 +16,10 @@
> #size-cells = <2>;
> model = "Xilinx Versal MINI eMMC0";
>
> - clk25: clk25 {
> + clk200: clk200 {
> compatible = "fixed-clock";
> #clock-cells = <0x0>;
> - clock-frequency = <25000000>;
> + clock-frequency = <200000000>;
> };
>
> dcc: dcc {
> @@ -38,9 +38,12 @@
> sdhci0: sdhci at f1040000 {
> compatible = "xlnx,versal-8.9a", "arasan,sdhci-8.9a";
> status = "okay";
> + non-removable;
> + disable-wp;
> + bus-width = <8>;
> reg = <0x0 0xf1040000 0x0 0x10000>;
> clock-names = "clk_xin", "clk_ahb";
> - clocks = <&clk25 &clk25>;
> + clocks = <&clk200 &clk200>;
> xlnx,device_id = <0>;
> no-1-8-v;
> xlnx,mio-bank = <0>;
> diff --git a/arch/arm/dts/versal-mini-emmc1.dts b/arch/arm/dts/versal-mini-emmc1.dts
> index 2f28f856a6a3..c342e6bdf7ad 100644
> --- a/arch/arm/dts/versal-mini-emmc1.dts
> +++ b/arch/arm/dts/versal-mini-emmc1.dts
> @@ -16,10 +16,10 @@
> #size-cells = <2>;
> model = "Xilinx Versal MINI eMMC1";
>
> - clk25: clk25 {
> + clk200: clk200 {
> compatible = "fixed-clock";
> #clock-cells = <0x0>;
> - clock-frequency = <25000000>;
> + clock-frequency = <200000000>;
> };
>
> dcc: dcc {
> @@ -38,9 +38,12 @@
> sdhci1: sdhci at f1050000 {
> compatible = "xlnx,versal-8.9a", "arasan,sdhci-8.9a";
> status = "okay";
> + non-removable;
> + disable-wp;
> + bus-width = <8>;
> reg = <0x0 0xf1050000 0x0 0x10000>;
> clock-names = "clk_xin", "clk_ahb";
> - clocks = <&clk25 &clk25>;
> + clocks = <&clk200 &clk200>;
> xlnx,device_id = <1>;
> no-1-8-v;
> xlnx,mio-bank = <0>;
> --
> 2.28.0
>
Applied.
M
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs
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