[PATCH v1 1/5] arm: socfpga: mailbox: Refactor mailbox timeout event handling

[Tan, Ley Foon]

> -----Original Message-----
> From: Ang, Chee Hong <chee.hong.ang at intel.com>
> Sent: Wednesday, August 12, 2020 9:56 AM
> To: u-boot at lists.denx.de
> Cc: Marek Vasut <marex at denx.de>; Simon Goldschmidt
> <simon.k.r.goldschmidt at gmail.com>; Tom Rini <trini at konsulko.com>; See,
> Chin Liang <chin.liang.see at intel.com>; Tan, Ley Foon
> <ley.foon.tan at intel.com>; Ang, Chee Hong <chee.hong.ang at intel.com>;
> Chee, Tien Fong <tien.fong.chee at intel.com>; Lim, Elly Siew Chin
> <elly.siew.chin.lim at intel.com>
> Subject: [PATCH v1 1/5] arm: socfpga: mailbox: Refactor mailbox timeout
> event handling
> 
> Add miliseconds delay when waiting for mailbox event to happen before
> timeout. This will ensure the timeout duration is predictive.
> 
> Signed-off-by: Chee Hong Ang <chee.hong.ang at intel.com>
> ---
>  arch/arm/mach-socfpga/mailbox_s10.c | 13 +++++++++----
>  1 file changed, 9 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/mach-socfpga/mailbox_s10.c b/arch/arm/mach-
> socfpga/mailbox_s10.c
> index f30e7f80a2..729d9b04fa 100644
> --- a/arch/arm/mach-socfpga/mailbox_s10.c
> +++ b/arch/arm/mach-socfpga/mailbox_s10.c
> @@ -29,13 +29,14 @@ DECLARE_GLOBAL_DATA_PTR;  static
> __always_inline int mbox_polling_resp(u32 rout)  {
>  	u32 rin;
> -	unsigned long i = ~0;
> +	unsigned long i = 2000;
> 
>  	while (i) {
>  		rin = MBOX_READL(MBOX_RIN);
>  		if (rout != rin)
>  			return 0;
> 
> +		udelay(1000);
>  		i--;
>  	}
> 
> @@ -176,11 +177,15 @@ static __always_inline int
> mbox_send_cmd_common(u8 id, u32 cmd, u8 is_indirect,
>  	MBOX_WRITEL(1, MBOX_DOORBELL_TO_SDM);
> 
>  	while (1) {
> -		ret = ~0;
> +		ret = 1000;
> 
>  		/* Wait for doorbell from SDM */
> -		while (!MBOX_READL(MBOX_DOORBELL_FROM_SDM) &&
> ret--)
> -			;
> +		do {
> +			if (MBOX_READL(MBOX_DOORBELL_FROM_SDM))
> +				break;
> +			udelay(1000);
> +		} while (--ret);
> +
>  		if (!ret)
>  			return -ETIMEDOUT;
> 

Reviewed-by: Ley Foon Tan <ley.foon.tan at intel.com>