[PATCH] xilinx: common: Do not save fdt_blob to bss section

[Michal Simek]

For SPL flow without specifying address for DT loading DTB is automatically
appended behind U-Boot code. Specifically _end symbol is used. Just behind
it there is place for bss section.
It means if early code is using static variable and there is a write to
this variable DTB file is corrupted if variable is located between DTB
start and end.
In this particular case offset of this variable from bss section start is
very small (0x40) that's why DT is currupted which breaks this boot flow.

Signed-off-by: Michal Simek <michal.simek at xilinx.com>
---

 board/xilinx/common/board.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c
index 569a418dbbff..06331cd88311 100644
--- a/board/xilinx/common/board.c
+++ b/board/xilinx/common/board.c
@@ -45,7 +45,7 @@ int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)
 #if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
 void *board_fdt_blob_setup(void)
 {
-	static void *fdt_blob;
+	void *fdt_blob;
 
 #if !defined(CONFIG_VERSAL_NO_DDR) && !defined(CONFIG_ZYNQMP_NO_DDR)
 	fdt_blob = (void *)CONFIG_XILINX_OF_BOARD_DTB_ADDR;
-- 
2.28.0