[PATCH 0/2] Add support for loading images above 4GB

Simon Glass sjg at chromium.org
Mon Sep 7 03:43:53 CEST 2020


Hi Michal,

On Thu, 3 Sep 2020 at 06:30, Michal Simek <michal.simek at xilinx.com> wrote:
>
> Hi,
>
> On 03. 09. 20 13:16, Heinrich Schuchardt wrote:
> > On 9/3/20 1:03 PM, Michal Simek wrote:
> >> Hi,
> >>
> >> We have several use cases where customers want to partition memory by
> >> putting NS images above 4GB. On Xilinx arm 64bit SOC 0-2GB can be used for
> >> others CPU in the systems (like R5) or for secure sw.
> >> Currently there is limitation in SPL to record load/entry addresses in
> >> 64bit format because they are recorded in 32bit only.
> >> This series add support for it.
> >> Patches have been tested on Xilinx ZynqMP zcu102 board in SD bootmode with
> >> images generated by binman. Because u-boot is using
> >> CONFIG_POSITION_INDEPENDENT it can be put to others 4k aligned addresses
> >> and there is no real need to build it to certain offset.
> >>
> >> Thanks,
> >> Michal
> >
> > Hello Michal,
> >
> > does this series require changes to doc/uImage.FIT/source_file_format.txt?
>
> I am not changing fit format. I am just changing how SPL records
> loadables in DT fit-images node. And also series is using FIT functions
> for reading these properties (at least in this version).

Well I think there should be some mention of the 32/64 bit issue added
to the FIT docs. How about adding an example with 64-bit addresses?

Regards,
Simon
'


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