[PATCH 7/8] ARM: dts: meson-axg: add USB nodes for S400
Neil Armstrong
narmstrong at baylibre.com
Thu Sep 10 10:48:18 CEST 2020
Add the correcly architectured USB Glue node for Meson AXG and the
S400 board in -u-boot.dtsi until support in upstream Linux then
backported.
Signed-off-by: Neil Armstrong <narmstrong at baylibre.com>
---
arch/arm/dts/meson-axg-s400-u-boot.dtsi | 12 +++++
arch/arm/dts/meson-axg-u-boot.dtsi | 62 +++++++++++++++++++++++++
2 files changed, 74 insertions(+)
create mode 100644 arch/arm/dts/meson-axg-u-boot.dtsi
diff --git a/arch/arm/dts/meson-axg-s400-u-boot.dtsi b/arch/arm/dts/meson-axg-s400-u-boot.dtsi
index c46eb3f38d..2c4b06f140 100644
--- a/arch/arm/dts/meson-axg-s400-u-boot.dtsi
+++ b/arch/arm/dts/meson-axg-s400-u-boot.dtsi
@@ -3,6 +3,8 @@
* Copyright (c) 2017 Amlogic, Inc. All rights reserved.
*/
+#include "meson-axg-u-boot.dtsi"
+
/* wifi module */
&sd_emmc_b {
status = "disabled";
@@ -12,3 +14,13 @@
&sd_emmc_c {
status = "okay";
};
+
+&usb {
+ status = "okay";
+ dr_mode = "otg";
+ vbus-supply = <&usb_pwr>;
+};
+
+&usb2_phy1 {
+ phy-supply = <&vcc_5v>;
+};
diff --git a/arch/arm/dts/meson-axg-u-boot.dtsi b/arch/arm/dts/meson-axg-u-boot.dtsi
new file mode 100644
index 0000000000..cb1c71e78c
--- /dev/null
+++ b/arch/arm/dts/meson-axg-u-boot.dtsi
@@ -0,0 +1,62 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 BayLibre, SAS.
+ * Author: Neil Armstrong <narmstrong at baylibre.com>
+ */
+
+/ {
+ soc {
+ usb: usb at ffe09080 {
+ compatible = "amlogic,meson-gxl-usb-ctrl";
+ reg = <0x0 0xffe09080 0x0 0x20>;
+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1_DDR_BRIDGE>;
+ clock-names = "usb_ctrl", "ddr";
+ resets = <&reset RESET_USB_OTG>;
+
+ dr_mode = "otg";
+
+ phys = <&usb2_phy1>;
+ phy-names = "usb2-phy1";
+
+ dwc2: usb at ff400000 {
+ compatible = "amlogic,meson-g12a-usb", "snps,dwc2";
+ reg = <0x0 0xff400000 0x0 0x40000>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clkc CLKID_USB1>;
+ clock-names = "otg";
+ phys = <&usb2_phy1>;
+ dr_mode = "peripheral";
+ g-rx-fifo-size = <192>;
+ g-np-tx-fifo-size = <128>;
+ g-tx-fifo-size = <128 128 16 16 16>;
+ };
+
+ dwc3: usb at ff500000 {
+ compatible = "snps,dwc3";
+ reg = <0x0 0xff500000 0x0 0x100000>;
+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ dr_mode = "host";
+ maximum-speed = "high-speed";
+ snps,dis_u2_susphy_quirk;
+ };
+ };
+ };
+};
+
+&apb {
+ usb2_phy1: phy at 9020 {
+ compatible = "amlogic,meson-gxl-usb2-phy";
+ #phy-cells = <0>;
+ reg = <0x0 0x9020 0x0 0x20>;
+ clocks = <&clkc CLKID_USB>;
+ clock-names = "phy";
+ resets = <&reset RESET_USB_OTG>;
+ reset-names = "phy";
+ status = "okay";
+ };
+};
--
2.22.0
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