[PATCH 3/7] riscv: Use NULL as a sentinel value for smp_call_function

[Bin Meng]

Hi Leo,

On Mon, Sep 14, 2020 at 9:58 AM Leo Liang <ycliang at andestech.com> wrote:
>
> On Fri, Sep 11, 2020 at 04:04:13PM +0800, Bin Meng wrote:
> > On Tue, Sep 8, 2020 at 2:17 AM Sean Anderson <seanga2 at gmail.com> wrote:
> > >
> > > Some IPIs may already be pending when U-Boot is started. This could be a
> > > problem if a secondary hart tries to handle an IPI before the boot hart has
> > > initialized the IPI device.
> > >
> > > This commit uses NULL as a sentinel for secondary harts so they know when
> > > the IPI is initialized, and it is safe to use the IPI API. The smp addr
> > > parameter is initialized to NULL by board_init_f_init_reserve. Before this,
> > > secondary harts wait in wait_for_gd_init.
> > >
> > > This imposes a minor restriction because harts may no longer jump to NULL.
> > > However, given that the RISC-V debug device is likely to be located at
> > > 0x400, it is unlikely for any RISC-V implementation to have usable ram
> > > located at 0x0.
> > >
> > > Signed-off-by: Sean Anderson <seanga2 at gmail.com>
> > > ---
> > >
> > >  arch/riscv/lib/smp.c | 26 ++++++++++++++++++++++----
> > >  1 file changed, 22 insertions(+), 4 deletions(-)
> > >
> >
> > Reviewed-by: Bin Meng <bin.meng at windriver.com>
>
> Hi Bin,
>
> There is a series of follow-up discussion on this patch that you might miss reading.
>
> This current patch will cause AE350 to fail booting,
>
> so maybe we should wait until Sean's next patch comes up to consider a reviewed-by tag.
>

Do we know why AE350 fails to boot with this patch?

If some big changes are reworked in newer patches, I believe author
should remove the tag and re-request the review.

Regards,
Bin